Broadcom Announces Industry's Highest Performance, Lowest Power 100GbE Gearbox PHYs
Provides New Interconnect Capabilities for Next Generation of 100GBASE Modules
IRVINE, Calif., Sept. 15, 2014 -- Broadcom Corporation (NASDAQ: BRCM), a global innovation leader in semiconductor solutions for wired and wireless communications, today announced the industry's highest performance, lowest power multi-rate 100 Gigabit Ethernet (GbE) gearbox physical layer transceiver (PHY), optimized for next-generation cloud-scale data center, enterprise and core networks. The 28 nm Broadcom® BCM82792 PHY, is the first device to offer dual 100 Gigabit per second (Gbps) ports on a single gearbox chip and doubles the density of existing solutions while reducing power consumption by up to 30 percent, operating at 2 watts per port1.
The rapid growth of bandwidth consumption across data center, enterprise and core networks is driving the transition of line cards and systems from 10G/40G to 100G. Poised for rapid expansion, the 100G Ethernet market is expected to grow five-fold by 2016, according to analyst firm Infonetics2. High-performance PHYs that support physical medium dependent (PMD) sub layers, such as 100GBASE-SR4 and CR4, are a critical component for this rapid growth.
Optimized for high-bandwidth networks, the dual-port Broadcom gearbox PHY has the ability to multiplex and demultiplex data across eight 25 Gbps channels to (or from) twenty 10 Gbps channels. The device can also be configured to support eight bi-directional lanes at 10 Gbps for 10GbE or 40GbE pass-through applications. High performance 25G/10G input/output (IO) eases routing constraints by providing for longer physical links.
"Next generation 100G networks demand the high performance, low power technologies that Broadcom is uniquely positioned to deliver," said Lorenzo Longo, Broadcom Vice President and General Manager, Physical Layer Products. "These first to market gearbox devices demonstrate our commitment to providing superior innovation and delivering a comprehensive portfolio of products to enable high density 100G networks."
"We're seeing strong demand for higher bandwidth solutions in data center, enterprise and core networks to handle the growth in network traffic," said Matthias Machowinski, Infonetics Directing Analyst, Enterprise Networks. "The higher density and low power consumption of Broadcom's new PHY will allow network managers to transform their networks and achieve higher performance on the industry's most widely adopted copper and short range links."
Broadcom also offers the BCM82790, a single port version of its 28 nm gearbox technology. This device delivers an easy upgrade path in a drop-in package compatible with Broadcom's current gearbox PHY.
Key Features:
- First IEEE802.3bj Clause 91 forward error correction (FEC) gearbox PHY
- Three-dimensional eye mapper on each high-speed receiver (28 total)
- 100GbE/OTN VSR28 to CAUI interface
- Integrated clean-up phase lock loop (PLL) reduces bill of material cost
- Single REFCLK (reference clock) input
- Low latency architecture
Resources
1 As compared to competitive devices
2 Infonetics August 2014
Availability
Broadcom's BCM82792 dual port and BCM82790 single port gearbox PHYs are now sampling.
About Broadcom
Broadcom Corporation (NASDAQ: BRCM), a FORTUNE 500® company, is a global leader and innovator in semiconductor solutions for wired and wireless communications. Broadcom® products seamlessly deliver voice, video, data and multimedia connectivity in the home, office and mobile environments. With the industry's broadest portfolio of state-of-the-art system-on-a-chip solutions, Broadcom is changing the world by connecting everything®. For more information, go to www.broadcom.com.
|
Related News
- Microsemi Collaborates with Silicon Creations to Enable Industry's Lowest Power FPGA 12.7G Transceivers With PHYs for Microsemi's PolarFire FPGAs
- Atmel Breaks Ultra-low Power Performance Barriers With World's Lowest Power ARM Cortex-M based Solution
- Broadcom Introduces Industry's First 40GbE Quad Port Gearbox PHY
- Cortina's New 15g CDR and Backplane PHY Leads Industry in Performance, Density and Low Power
- NetLogic Microsystems Introduces the Industry's Lowest Power 10/40/100GE PHY for Next-Generation Data Center Ethernet Applications
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |