Wi-Fi 6 (ax)+BLEv5.4+15.4 Dual Band RF IP for High-End Applications.
TVS announces new CPU Verification tool development
February 23, 2015 -- TVS is pleased to announce the development of a new “Event Stream Generator”.
Processors (CPU, GPU, DSP, etc.) are becoming more complex and require more verification. The current best practise in processor verification is instruction stream generation.
The TVS instruction stream generator (asureISG) will have the following major features
- Offline generation: the instructions are generated in advance of simulation for quicker generation speeds.
- Sequence generation: sequences of instructions can push a design into the corners where the bugs lurk!
- Multicore support: asureISG can be programmed to generation instructions for multiple cores allowing it to generate sequences of instruction streams for multiple cores. Those sequences can interlaced with defined synchronisation points for multicore verification.
- Coverage support: coverage models can be built into the generation to help direct the generation.
asureISG is currently under development with TVS key clients but we are open to more early adopter partners who want to influence the development.
|
Related News
- Imperas and Metrics Collaborate to Jump Start RISC-V Core Design Verification Using Open Source Instruction Stream Generator
- Cadence to Optimize Digital Full Flow and Verification Suite for Arm Cortex-A78 and Cortex-X1 CPU Mobile Device Development
- TVS extends CPU Verification Capability
- TVS adds web interface to its asureSIGN verification tool for real-time requirements management sign-off status
- Xilinx Ships New Release Of System Generator For DSP Development Tool With Full Support For Latest MatLab & Simulink Software
Breaking News
- intoPIX Powers Ikegami's New IPX-100 with JPEG XS for Seamless & Low-Latency IP Production
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
- Qualcomm initiates global anti-trust complaint about Arm
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- SiliconIntervention Announces Availability of Silicon Based Fractal-D Audio Amplifier Evaluation Board
Most Popular
- Qualcomm initiates global anti-trust complaint about Arm
- Siemens acquires Altair to create most complete AI-powered portfolio of industrial software
- Alphawave Semi Reveals Suite of Optoelectronics Silicon Products addressing Hyperscaler Datacenter and AI Interconnect Market
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- Rapidus Announces Strategic Partnership with Quest Global to Enable Advanced 2nm Solutions for the AI Chip Era
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |