AMBA Parameter Configurable Multi-Channel DMA Controller (typically 1 to 256)
Hitachi Reduces Verification Turnaround Time for Mixed-Signal Chip with Cadence Virtuoso AMS Designer
SAN JOSE, Calif. -- Feb 25, 2015 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Hitachi Ltd. utilized Cadence® Virtuoso® AMS Designer to significantly reduce the verification time for a new backplane signal conditioner mixed-signal chip, while also improving quality with chip verification. The rapid growth of mixed-signal design complexity presents considerable verification challenges to reduce time to market and improve design quality. Using Virtuoso AMS Designer together with real number modeling (RNM) techniques, Hitachi was able to simulate the entire design and reduce the verification time from days to minutes. Hitachi presented a paper on this design and their use of Virtuoso AMS Designer and RNM on February 23 at ISSCC 2015 in San Francisco, Calif.
“For our large-scale, high-speed mixed-signal designs, Virtuoso AMS Designer enabled us to utilize chip verification to reduce design turnaround time and to improve the design quality significantly,” said Satoshi Ueno, director, Design Engineering Second Dept., Platform Advanced Engineering Operation, Information & Telecommunication Systems Company, Hitachi, Ltd. “In order to extend the design success of our high-end mixed-signal designs at the 28nm node and beyond, we continue to count on the comprehensive solution and extensive support from Cadence.”
Virtuoso AMS Designer is a mixed-signal simulation solution for the design and verification of analog, RF, memory, and mixed-signal SoCs. It is integrated with the Virtuoso Analog Design Environment (ADE) for mixed-signal design and verification. It is also integrated with the Cadence Incisive® functional verification platform for mixed-signal verification within the digital verification environment.
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
|
Cadence Hot IP
Related News
- Hitachi Adopts Cadence AMS Model-Based Methodology and Tools for Mixed-Signal Design Verification
- Silicon Labs Significantly Reduces Design Time Using the Cadence Mixed-Signal Low-Power Flow
- Cadence Verification IP Significantly Reduces Verification Turnaround Time for ARM AMBA 4 Protocols
- Cadence Unveils New Palladium Z2 Apps with Industry's First 4-State Emulation and Mixed-Signal Modeling to Accelerate SoC Verification
- DB GlobalChip Deploys Cadence's Spectre FX and AMS Designer, Accelerating IP Verification by 2X
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |