sureCore Limited Opens Leuven Design Centre
Sheffield, England - April 14, 2015 - sureCore Ltd., the low power SRAM IP company, today announced the opening of its new Design Centre in Leuven, Belgium.
sureCore chose the Leuven location to tap into the design ecosystem around imec and to maximize imec's recently announced investment in the company.
The Design Centre will focus on developing production-ready, low power, low voltage capable SRAM designs that can be easily integrated into SoCs. It will be headed by Dr. Stefan Cosemans, who spent the last 10 years focusing on variability tolerant, low power SRAM design techniques.
"The Leuven Design Centre is a huge step forward, allowing sureCore to shorten cycle times to production ramped products," explained Paul Wells, sureCore's CEO. "The initial team staffing this facility has numerous patents to its credit, positioning it as a centre of low power SRAM excellence right from the start."
The new centre extends the design expertise of the sureCore technology team by adding key personnel whose principal focus is on low power SRAM design. The Leuven team will accelerate the optimisation of the sureCore world-class, low power technology and ensure its production readiness.
sureCore's low power SRAM IP technology is particularly attractive to wearable electronics and Internet of Things (IoT) applications where extending battery life is crucial. It is also valuable in the networking space where power and heat dissipation are critical considerations. A successful 28nm test chips run in March last year delivered more than 50% power savings versus industry-standard SRAMs.
About sureCore
sureCore Limited is an SRAM IP company based in Sheffield, UK, developing low power memories for next generation silicon process technologies. Its world-leading, low power SRAM design is process independent and variability tolerant, making it suitable for a wide range of technology nodes. This IP will help SoC developers meet both challenging power budgets and manufacturability constraints posed by leading edge process nodes. www.sure-core.com
|
Related News
- SureCore announces low power cryogenic memory technology that could help dramatically cut data centre power usage
- sureCore Opens Low Power Memory Compiler Access
- Sankalp Semiconductor Opens Second Design Centre in Bangalore
- sureCore Opens Low-Power SRAM IP Customization Service
- Moortec Opens New European Design Centre in Poland
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |