Adaptive Silicon and Atrenta Partner to Provide RTL Coding Rules for Programmable Logic Cores

Adaptive Silicon and Atrenta Partner to Provide RTL Coding Rules for Programmable Logic Cores

Combined Product Assures Best RTL Design Practices to Achieve Silicon Density and Performance Goals

LOS GATOS, Calif./SAN JOSE, Calif. - October 8, 2001 - Adaptive Silicon, Inc. (ASi) of Los Gatos, Calif., and Atrenta Inc. of San Jose, Calif., today announced that ASi is developing an Adaptive Silicon specific rule set that will be bundled with Atrenta's SpyGlass RTL rule checking software. ASi will OEM and distribute SpyGlass-AdaptiveSilicon with the custom ASi rules with a future release of its Millennium PLC software, which is used to implement designs in ASi's MSA 2500 Programmable Logic Core.

"The use of SpyGlass by our licensees and their customers will provide assurance that their RTL designs meet best practices for designing for our unique embedded programmable logic cores," said Joe Mastroianni, vice president of product development at Adaptive Silicon. "Since our licensees are designing large, complex system-on-chip (SoC) designs, the enforcement of good design practices will help them to achieve their density and performance goals with a minimum of design iteration cycles."

"By offering a custom rule checker to its customers, ASi will speed the design process and make it much easier for designers to employ their embedded programmable logic," said Ghulam Nurie, senior vice president of marketing and business development at Atrenta. "SpyGlass' built-in synthesis engine allows for very thorough checking of complex rule violations that can be easily missed in RTL coding. By catching and correcting these violations before time consuming synthesis and simulation runs, designers can be spared the agony of making gate-level changes to their designs."

Advantage of Embedded Programmable Logic
By architecting a family of products with embedded programmable logic, it is possible to produce a number of different silicon products from a single die, avoiding the increasing costs of masks, prototype silicon and parallel engineering development efforts.

Embedded programmable logic also permits high-risk blocks of a SoC device to be modified after first silicon is produced. Consequently, such devices may be fabricated earlier in the development process without risking modification of the overall design and re-spinning the silicon. Embedding programmable logic also provides the flexibility to modify devices once shipped to customers to upgrade algorithms or accommodate changes in standards or protocols in applications like communications and image processing.

Benefits of Rule Checking
By checking RTL code up front, designers can eliminate time-consuming design iterations. Problems are detected and corrected at the RT level, prior to synthesis, enabling a highly efficient and productive design process. The designs created are better optimized, reusable, and go through the design flow with minimal problems. Time-consuming verification iterations can be eliminated by catching problems up front. By including a fast synthesis engine, Atrenta has taken rule checking to a new level, providing checks never before possible for things like combinational loops and complex synchronization problems.

ASi expects to make SpyGlass-Adaptive Silicon available in the fourth quarter of 2001.

About Atrenta
Atrenta's unique SpyGlass rule checker captures, aggregates, distributes and applies collective knowledge and constraints critical for correct and efficient design of electronic products. Atrenta's customers, such as Agilent, Apple, ARM, Canon, Compaq, Hitachi, LSI Logic, Motorola, National Semiconductor and NCR, are using SpyGlass to achieve shorter overall design cycles, increased design productivity and lower costs. Atrenta, a spin-off of Interra, Inc., is headquartered in San Jose, California, with European headquarters in Swindon, England, and a sales and support distributor in Japan. For further information, visit the Atrenta website at www.atrenta.com or call 1-866 ATRENTA.

About Adaptive Silicon, Inc.
Adaptive Silicon, Inc. (ASi) is a privately financed silicon intellectual property (IP) company. ASi licenses a Programmable Logic Core(tm) (PLC() that semiconductor and systems companies embed into large system chip ASSPs and ASICs. The company announced its MSA 2500 Programmable Logic Cores and the companion Millennium PLC Software products in the Spring of 2001. ASi is located in Los Gatos, California, and may be reached at 408-335-2700, or via the world wide web at info@adaptivesilicon.com or www.adaptivesilicon.com.
 

### Programmable Logic Core and PLC are trademarks of Adaptive Silicon, Inc. Spyglass is a trademark of Atrenta, Inc.

Press contact for Atrenta:
Paula Jones - Tel: 650-967-3711 paula@newiic.com

Press contacts for ASi:
North America
Linda Riedman - KVO Public Relations   Tel: 503-402-1442

Europe
Dick Selwood   Tel: 44-(0)-1962-85-3781

Germany
Sigrid Scondo - PRismaPR   Tel: 49-89 06247233