JEDEC Announces Support for NVDIMM Hybrid Memory Modules
ARLINGTON, Va.-- May 26, 2015 --JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, has announced that its JC-45 Committee has approved the first standards for support of “hybrid” DDR4 memory modules which are defined as modules that plug into standard dual in-line memory module (DIMM) sockets and appear like a DDR4 SDRAM to the system controller, yet contain non-volatile (NV) memories such as NAND Flash on the module. These hybrid module families are referred to as Non-Volatile DIMMs, or NVDIMMs, and they may share the memory channel with other standard DDR4 DIMMs. Publication is expected later this year.
“The introduction of hybrid memory modules into system platform architectures adds new levels of functionality to the computer memory hierarchy,” said Mian Quddus, Chairman of JEDEC’s JC-45 Committee for Dynamic Random Access Memory (DRAM) Modules. He added, “Non-volatile memory may be used for data persistence, mass storage, and the door is now opened for innovative new applications using the high speed of the DRAM channel. NAND Flash is the first non-volatile memory to be incorporated into the channel; however, the industry is poised for other memory types to be included as well. The framework established by JEDEC is flexible enough to allow for a variety of memories to be included under the ‘hybrid’ umbrella.”
JEDEC’s JC-45 Committee for Memory Modules developed the NVDIMM taxonomy in cooperation with the NVDIMM Special Interest Group (SIG), a subcommittee of the Solid State Storage Initiative within the Storage Networking Industry Association (SNIA). The first two versions of these hybrid modules are the NVDIMM-N, which combines DRAM and NAND Flash where the Flash provides backup and restore of all DRAM for reliable data persistence through power failure; and the NVDIMM-F, which provides directly addressable NAND Flash which is accessed as a block oriented mass storage device.
“The NVDIMM SIG was formed to accelerate the awareness and adoption of NVDIMMs,” stated Jeff Chang, Co-Chair of the SNIA NVDIMM SIG. Co-Chair Arthur Sainio added, “The synergy between JEDEC and the NVDIMM SIG on the introduction of hybrid modules is accelerating the market acceptance of exciting new system configurations looking to take advantage of persistent memory at DRAM speeds. NVDIMMs are in production now by multiple suppliers, with many new product introductions in the coming months.”
Hybrid modules such as the NVDIMM-N and NVDIMM-F are supported in new DDR4 Serial Presence Detect (SPD) codes to be released later this year, and new standard DDR4 DIMM labels are in the review process for release in 2015 as well. JEDEC has also defined specific signals on the DIMM connector to facilitate plug-and-play implementation of NVDIMMs on standard platforms.
About JEDEC
JEDEC is the global leader in the development of standards for the microelectronics industry. Thousands of volunteers representing nearly 300 member companies work together in 50 JEDEC committees to meet the needs of every segment of the industry, manufacturers and consumers alike. The publications and standards generated by JEDEC committees are accepted throughout the world. All JEDEC standards are available for free download from the JEDEC website. For more information, visit www.jedec.org.
|
Related News
- JEDEC Announces Publication of Serial Presence Detect Support and Module Labels Specifications to Support New Hybrid Memory (NVDIMM)
- JEDEC Publishes New Standard to Support CXL Memory Module Implementation
- Persistent Memory Platform Support Will Take Time
- JEDEC® Adds to Suite of Standards Supporting Compute Express Link® (CXL®) Memory Technology with Publication of Two New Documents
- JEDEC® Announces Publication of Compute Express Link® (CXL®) Support Standards
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |