Mixel Achieves First-Time Silicon Success with MIPI D-PHY RX+ Configuration
The IP is silicon proven in 40nm and 28nm process nodes and is going into high-volume production
San Jose, CA – June 8th, 2015 - Mixel®, the leader in mobile mixed-signal intellectual property (IP), announced today that its RX+ D-PHYSM IP is silicon-proven in both 40nm and 28nm process nodes and is going into high-volume production in customer’s product. The MIPI® D-PHY RX+ is a Mixel proprietary implementation of the Camera Serial Interface (CSISM) and Display Serial Interface (DSISM) D-PHY Receiver optimized for reduced area and power, while achieving full-speed production and in-system testing, and higher performance compared to traditional receiver configurations.
As MIPI expands beyond the traditional mobile platform into safety sensitive applications, such as automotive and medical applications, full-speed, in-system testability and diagnostics are becoming of paramount importance.
Traditional D-PHY implementations that support full-speed production test use the Universal configuration, which requires the inclusion of multiple high-speed and low-power transmitters. The innovative RX+ configuration developed by Mixel and deployed by its first-tier customer, uses only one transmitter to test all the multiple data channels, thus saving substantial area and standby power, and allowing higher data rate performance by minimizing the capacitive load at the high-speed serial interface pins.
This Mixel proprietary implementation of the MIPI D-PHY combines the small area and improved performance of RX configuration with the testability and diagnostics of the Universal configuration; the best of both worlds.
Since the D-PHY TX area is significantly larger than that of RX, Mixel’s RX+ configuration has smaller area and standby current, as only 2 transmitters are need instead of the 5 transmitters that would be needed for a conventional 4 data-lanes Universal lane configuration. The reduction in area is 35% while standby power reduction is 50%.
The RX+ configuration was developed and implemented by Mixel independent of the MIPI® Alliance and is Compliant with MIPI Alliance’s D-PHYSM RX. Mixel achieved first-time silicon success with this IP in both 40nm and 28nm process nodes.
“This is a great addition to our expanding and differentiated MIPI portfolio,” said Ashraf Takla, Mixel’s President and CEO. “We are delighted to see that this unique Mixel MIPI IP is being integrated into our customer’s products at multiple nodes and going into high-volume production.”
Mixel has co-authored a technical article describing this differentiated IP, and will be demonstrating many of its own and its customers’ products at DAC 2015, June 8th through the 10th at the San Francisco Moscone Center.
About Mixel:
Mixel is the leader in mixed-signal mobile IPs and offers a wide portfolio of high-performance mixed-signal connectivity IP solutions. Mixel’s mixed-signal portfolio includes PHYs and SerDes, such as Mobile PHYs (MIPI® D-PHY, M-PHYSM, C-PHYSM and LVDS), and high-performance PLL and DLL IP cores. For more information contact Mixel at info@mixel.com or visit www.mixel.com.
About The MIPI Alliance:
MIPI (MIPI®) Alliance is a global, collaborative organization comprised of companies spanning the mobile ecosystem that are committed to defining and promoting interface specifications for mobile devices. MIPI Specifications establish standards for hardware and software interfaces which drive new technology and enable faster deployment of new features and services across the mobile ecosystem. For more information, go to www.mipi.org.
|
Mixel, Inc. Hot IP
Related News
- Mixel Granted US Patent for its Innovative MIPI D-PHY RX+ Configuration
- Anapass Achieves First-Time Success with Mixel's Complete MIPI Solution
- Mixel's Patented D-PHY RX+ IP Extends Market Share with Automotive Microcontrollers
- Mixel Achieves First Silicon Success With Its MIPI M-PHY IP
- Mixel Announces Immediate Availability of MIPI C-PHY/D-PHY Combo IP on STMicroelectronics 40LP Process Technology
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
E-mail This Article | Printer-Friendly Page |