Process Detector (For DVFS and monitoring process variation)
DAC Trip Report: Expanding EDA's Charter & Topical Hardware Emulation
Lauro Rizzatti, Verification Consultant
EETimes (6/29/2015 11:30 AM EDT)
As per tradition, Gary Smith kicked off the 52nd DAC June 7 in San Francisco, presenting his EDA industry forecast. Gary remarked that EDA is healthy at over $6 billion with an estimated growth of about 11% over the next five years. However, this is not meeting Wall Street's expectations. Aiming at correcting this issue, he played various scenarios to raise revenues and growth in the design automation space. He added IP, embedded software, optical, biomedical, chemical, and mechanical, with each contributing a slice of the pie in the multi billion-dollar range. The real difference would come by combining traditional EDA with Mechanical Engineering.
Should we drop the "E" and simply call this marriage DA?
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related News
- China's EDA startup X-Epic forced to lay off staff, says report
- Google and eSilicon at DAC 2019: Doing EDA in the Cloud? Yes, It's Possible!
- 0-In Delivers EDA Industry’s First PCI Express Verification IP for Simulation, Formal Verification and Hardware Acceleration and Emulation
- RIKEN adopts Siemens' emulation and High-Level Synthesis platforms for next-generation AI device research
- Arm's calendar Q2 revenues up 39% y-o-y
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset