RISC vs CISC: What's the Difference?
Analysis of ARM, X86, MIPS designs shows no difference
Bernard Cole, Editor of the EE Times' Microcontroller and Printed Circuit Board Designlines
EETimes (6/30/2015 06:07 PM EDT)
A new study comparing the Intel X86, the ARM and MIPS CPUs finds that microarchitecture is more important than instruction set architecture, RISC or CISC.
If you are one of the few hardware or software developers out there who still think that instruction set architectures, reduced (RISC) or complex (CISC), have any significant effect on the power, energy or performance of your processor-based designs, forget it.
Ain't true. What is more important is the processor microarchitecture — the way those instructions are hardwired into the processor and what has been added to help them achieve a specific goal.
This is the over-arching conclusion of a study recently published in the ACM Transactions on Computer Systems. In the paper, "ISA Wars: Understanding the Relevance of ISA being CISC or RISC," authors Emily Blem, Jakrishnan Menon, Thiruvengadam Vijayaraghavan, and Karthhikeyan Sankaralingam, report the results of a study over the last four years or so by the University of Wisconsin (Maidison) Vertical Research Group(VRG).
E-mail This Article | Printer-Friendly Page |
Related News
- ARM versus Intel: a successful stratagem for RISC or grist for CISC's tricks?
- Now Gelsinger is gone, what is Intel's Plan B?
- What does Renesas' acquisition of PCB toolmaker Altium mean?
- What's driving the acquisitions in the analog design realm?
- Do more with less energy! What's behind Dolphin Design's Energy Efficient Platforms?
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models