Soft Machines Unveils VISC Processor and SoC Roadmap
SANTA CLARA, Calif. – Oct. 7, 2015 – Soft Machines Inc., a Silicon Valley-based company that licenses and co-develops microprocessor and SoC products for IoT, mobile, networking and cloud markets, today revealed its VISC processor and SoC roadmap at the Linley Processor Conference. The world’s first VISC processor, Shasta, will deliver unprecedented performance efficiency levels. Soft Machines also disclosed the highly scalable Mojave VISC SoC platform, which can be customized for smart mobile to server applications. Both Shasta and Mojave will be released in 2016.
Shasta delivers on the promise of the VISC architecture, which was unveiled in October 2014. The VISC architecture offers 2-3 times instructions per cycle (IPC) speedup, with up to 4 times performance per watt over today’s leading-edge CPUs. The VISC architecture is based on virtual cores that permit one processor thread to operate concurrently on multiple processor cores, overcoming many single-core frequency and power-scaling issues, and multicore programming challenges. VISC also includes a virtual software layer that makes it portable to all CPU ISAs and ecosystems.
“Delivering the first VISC processor and SoCs is a major achievement for our pioneering microprocessor architecture,” stated Soft Machines Co-founder, Vice Chairman and CEO Mahesh Lingareddy. “We have received several proposals and are working with customers to define Shasta VISC designs for multiple ISAs, virtual core configurations and SoC features to be delivered in 2016.”
“The Shasta VISC processor is designed to deliver server-class performance within mobile power envelopes,” said Soft Machines Co-founder, President and CTO Mohammad Abdallah. “Shasta can be configured for dual or quad 64-bit virtual cores, providing a step-function in performance per watt on platforms ranging from smartphones and tablets to laptops and servers.”
About Soft Machines, Inc.
Soft Machines is a semiconductor company co-developing VISC architecture-based processor and SoC products for all major performance computing platforms and has raised close to $175 million in funding to date. Corporate headquarters are in Santa Clara, California, U.S., with operations in India and Russia. Soft Machines investors include Samsung Ventures, AMD, GLOBALFOUNDRIES, RVC, KACST, RUSNANO, TAQNIA and others.
|
Related News
- Renesas Unveils Processor Roadmap for Next-Gen Automotive SoCs and MCUs
- Soft Machines Unveils VISC Microprocessor Architecture Breakthrough; Revives Performance-per-Watt Scaling
- Breker Verification Systems Unveils Easy-To-Adopt Integrity FASTApps Targeting RISC-V Processor Core, SoC Verification Scenarios
- DSP Group Unveils DBM10 Low-Power Edge AI/ML SoC with Dedicated Neural Network Inference Processor
- Nordic Semiconductor unveils world's first dual Arm Cortex-M33 processor wireless SoC for the most demanding low power IoT applications
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |