VSIA may widen charter to software reuse standards

VSIA may widen charter to software reuse standards
By Michael Santarini, EE Times
October 4, 2001 (12:52 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011004S0072

SAN JOSE, Calif. — After five years of creating standards for hardware-based virtual components, the Virtual Socket Interface Alliance (VSIA) is considering expanding its charter to include standards creation for software-based virtual components.

The idea has been kicked around in the back rooms of VSIA for some time now. But at a member meeting held here this week, the alliance assembled a panel and a keynote to bring the topic to a public forum.

The organization also announced that its Functional Verification Development Working Group (DWG) has accepted the Motorola Semiconductor Products Sector's donation of the functional verification chapter of Motorola's Semiconductor Reuse Standards (SRS).

The panel, moderated by VSIA marketing vice president Larry Cooke, included Gary Smith, chief EDA analyst at Dataquest; Ed Smith, vice president of marketing for Sonics; Ian Phillips of ARM; and Grant Martin, an R&D fellow at Cadence Design Systems.

The panel's overwhelming conclusion was that VSIA should indeed expand its charter to create standards for software intellectual property. But the panelists took care to warn that the alliance, even as it charts new territory, must continue to create and hone standards for hardware-based virtual components.

Cooke and Gary Smith outlined how the software content on systems-on-chip has grown in importance and size in the past five years. Increasingly, Cooke said, the elements that differentiate competitors' products are being implemented in software.

When the alliance was formed back in 1996, the chip design industry was wondering how it would manage to use all the gates being made available as a result of new silicon foundry processes, Cooke noted. At the time, the prevailing idea was to use large, preconfigured blocks of functions, later called virtual components, to fill most of the chip and add differentiation in the SoC with hardware logic.

Thus, VSIA was born to create standard s and iron out the legal issues associated with licensing such IP. Over the years, as the alliance busied itself creating standards for virtual components, foundry process developers made even more gates available, and companies adopted platforms that consisted of several preconfigured, pre-interconnected cores.

Now, according to Cooke and Dataquest's Smith, gate counts are becoming so high that entire SoCs will be filled with platforms and cores, and system differentiation will be accomplished in software.

"Real system design has software as well as hardware content, and in the future we will see more software," said Dataquest's Smith. "Unless we solve the software problems, we are not going to get to true system-on-chip design." Smith sees a role for the VSIA in bringing the software world into the fold via standards.

Sonics' Ed Smith, like the other panelists, agreed that VSIA should help establish software reuse standards, much as it has marshaled standards for hardware virtual components. B ut he cautioned that work remains to be done on hardware VC standardization. "We haven't achieved VSIA's original goal — reuse with out rework," Smith said.

The Sonics executive called for further progress in encouraging the adoption of existing VSIA standards, improving the value of those specs and standards, and implementing a meaningful certification program and process. The organization should step into the breach and lead efforts to establish standards for platforms using mixes of hardware and software, he said.

ARM's Phillips, speaking from a systems company perspective, said that many of today's largest SoC designs already require a staggering number of man-years to develop and that future designs may be all but impossible to accomplish in a reasonable time frame unless changes are made in how designs are accomplished.

Phillips noted that Toshiba's Playstation 2 Emotion engine chip, which had 13.5 million transistors, required 800 man-years of development time. He then displayed a cur ve based on current design sizes vs. man-years that showed how, in the next five years or so, the industry could see the advent of 100 million-transistor chips requiring 1,800 man-years to develop. Gigatransistor chips, he said, could require 8,500 man-years.

The graph, according to Phillips, underscores the need for productivity tools as well as both hardware and software reuse. And those requirements call for an organization that would set guidelines for monitoring the quality of reusable hardware and software.

Cadence's Martin similarly encouraged VSIA members to take on the problems of software reuse. "There has been a division between the hardware and software camps, but VSIA could serve as a unifying force," Martin said.

Moto pitches in

Meanwhile, the VSIA's Functional Verification DWG has accepted the functional verification chapter of Motorola's Semiconductor Reuse Standards. DWG chairman Tom Anderson said the working group will likely use portions of the SRS chapter to cr eate its deliverables document, which should be available by the end of the year.

Earlier this year, Anderson's group defined taxonomy.

Motorola uses the SRS to set guidelines for the design and transfer of reusable virtual components. The company is said to be considering donating the entire document to VSIA.