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NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Free Core, Some Assembly Required
RISC-V rallies engineers for open hardware
Rick Merritt, EETimes
1/7/2016 07:50 AM EST
REDWOOD SHORES, Calif. – It’s early days for RISC-V -- a free, open-source core seen as the Linux of microprocessors. On its long to-do list, engineers still need to define basic pieces of the instruction set architecture including its memory model, how it will speak to the external world of I/Os and how to debug it.
Many of the about 150 developers who signed up for the third RISC-V workshop volunteered to start a handful of working groups to address the most pressing issues in fundamental areas including security, virtualization and compliance. Proponents said the effort has taken the vanguard of the open source hardware movement, attracting leaders of earlier OpenCore and OpenRISC efforts.
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