Credo Delivers Industry's Lowest Power 100G MUX Device Based on 50Gbps SerDes Technology
New Chip Solution Leverages Analog PAM-4 SerDes to Enable 50Gbps/Lambda Optical Connectivity
MILPITAS, CA -- January 12, 2016 -- Credo Semiconductor, a global innovation leader in Serializer-Deserializer (SerDes) technology, today announced it is entering the chip market with a sub 1 Watt multiplexer (MUX)/retimer device that leverages the company's unique SerDes architecture and low-cost analog technology to enable 100G optical modules with 50G per lambda throughput. The Credo® CMX12550 MUX, sampling now, supports four bidirectional lanes running at 25Gbps with NRZ signaling and 2 bidirectional lanes running at 50Gbps with PAM-4 signaling.
"The combination of our unique analog architecture and advanced equalization techniques has allowed us to deliver a solution that solves the significant thermal and performance challenges associated with developing next-generation optical modules," said Jeff Twombly, vice president of business development for Credo. "As the first of many off-the-shelf semiconductor solutions to come from Credo, this new device demonstrates how our SerDes IP technology can be applied to enable accelerated throughput in the data center."
While other companies have had to resort to high power and expensive DSP architectures to achieve 50Gbps SerDes line rates, Credo's unique approach achieves these line rates with significantly lower power consumption while meeting the reach performance requirements of next-generation optical networking applications. In addition to optical modules, the CMX12550 device can also be deployed on line cards providing a native 50G PAM4 interface into optical modules, thus enabling a doubling of throughput on the front panel.
The device is compliant with many industry standards including CEI-28G-VSR/SR, CEI-56G-VSR-PAM4, CAUI-4, and CDAUI-8.
Availability and Packaging
Credo is currently sampling the CMX12550 device in a 10x10mm FCBGA package. Credo supports its offering with a comprehensive evaluation kit, also available now, that allows customers to quickly assess the performance in their specific application environments. Other device family members are expected to sample this summer.
Companies interested in learning more about the company's current silicon and intellectual property engagement options, as well as future developments should contact Sales@credosemi.com.
About Credo Semiconductor
Credo is a leading provider of high performance, mixed-signal semiconductor solutions for the data center, enterprise networking and high performance computing markets. Credo's advanced Serializer-Deserializer (SerDes) technology delivers the bandwidth scalability and end-to-end signal integrity for next generation platforms requiring single-lane 25G, 50G, and 100G connectivity. The company makes its SerDes available in the form of Intellectual Property (IP) licensing on the most advanced processing nodes and with complementary product families focused on extending reach and multiplexing to higher data rates. Credo is headquartered in Milpitas, California and has offices in Shanghai and Hong Kong. For more information: www.credosemi.com
|
Credo Semiconductor Hot IP
Related News
- Credo Delivers Industry's Lowest Power 16nmFF+ 28G LR-Compliant SerDes IP With Comprehensive Development Platform
- Actel's ProASIC3 Device Delivers Lowest Total System Cost and Power to Million-Gate FPGAs
- AnalogX Announces World's Lowest Power SERDES IP in 7nm and 6nm and Expansion Plan
- Atmel Delivers Industry's Lowest Power ARM Cortex-A5-based MPU with Leading Security Features for Industrial IoT and Wearable Applications
- Analog Bits Unveils Industry's Lowest Power 40nm High Bandwidth SerDes
Breaking News
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PiMCHIP Deploys Ceva Sensor Hub DSP in New Edge AI SoC
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
Most Popular
- DENSO and U.S. Startup Quadric Sign Development License Agreement for AI Semiconductor (NPU)
- Xiphera and Crypto Quantique Announce Partnership for Quantum-Resilient Hardware Trust Engines
- Arm's power play will backfire
- Alchip Announces Successful 2nm Test Chip Tapeout
- Faraday Unveils HiSpeedKit™-HS Platform for High-speed Interface IP Verification in SoCs
E-mail This Article | Printer-Friendly Page |