Cadence Announces Complete Digital and Signoff Reference Flow for Imagination Technologies' PowerVR Series7 GPUs
Achieved area reduction of up to seven percent and delivered a 2X improvement in turnaround time
SAN JOSE, Calif., Feb. 1, 2016 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the delivery of a complete digital and signoff reference flow for Imagination Technologies' (IMG.L) PowerVR Series7 graphics processing units (GPUs). Using the integrated Cadence® reference flow, the full synthesis and implementation of 5.5M instances was completed in 2.5 days, which provided more than a 2X turnaround time improvement in comparison with previous Cadence design flows. The new flow also achieved an average area reduction of three percent, while achieving a seven percent area reduction on Imagination's most complex block.
The simple, single-pass Cadence flow provides designers with guidelines to optimize their PowerVR GPU cores via documentation and scripts that are easy to deploy and support. The flow includes the following Cadence digital and signoff tools:
- Innovus™ Implementation System: A next-generation physical implementation tool that incorporates a massively parallel architecture, enabling SoC developers to deliver high-quality designs with highly competitive power, performance and area (PPA)
- Genus™ Synthesis Solution: An RTL synthesis and physical synthesis engine that mitigates productivity challenges faced by RTL designers, delivering up to 5X faster synthesis turnaround times and up to 20 percent datapath area reduction, while scaling linearly beyond 10M instances
- Tempus™ Timing Signoff Solution: A complete timing analysis tool that reduces signoff timing closure through massively parallel processing and physically aware timing optimization
- Conformal® Equivalence Checker: The industry's most widely supported independent formal verification solution enabling the verification and debug of multi-million-gate designs without using test vectors
- Quantus™ QRC Extraction Solution: A next-generation parasitic extraction tool that is production proven and provides faster runtimes for single- and multi-corner extraction and best-in-class accuracy versus the foundry golden
For more information on the Cadence solutions for the PowerVR reference flow, please visit www.cadence.com/news/imgrefflow.
"As a leading graphics technology, PowerVR GPUs are found inside some of the world's most popular products," said Tony King-Smith, EVP marketing at Imagination. "Our customers care deeply about the speed and footprint of our highly scalable GPUs in their production chips. We collaborated with Cadence to help them create this reference flow based on Cadence digital and signoff tools that help our licensees bring to production smaller, faster chips in less time."
"We see a significant opportunity for our joint customers to achieve improved PPA using the new Cadence digital and signoff reference flow on Imagination's PowerVR GPUs," said Dr. Anirudh Devgan, senior vice president and general manager of the Digital and Signoff Group at Cadence. "By focusing on the complex needs of today's designers, we successfully created an optimal flow for PowerVR that surpasses the results of previous flows and enables our many customers using PowerVR GPUs to bring reliable, innovative designs to market more rapidly."
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at www.cadence.com.
|
Cadence Hot IP
Related News
- Cadence Reference Flow with Digital and Signoff Tools Certified on Samsung's 10nm Process Technology
- Imagination's new PowerVR GPUs enable chip companies and OEMs to create the best possible user experience in cost-sensitive devices
- Imagination's new PowerVR GPUs deliver leading performance in lowest area for mid-range markets
- Cadence Digital and Signoff Tools Enabled for GLOBALFOUNDRIES 22FDX Platform Reference Flow
- Scalable PowerVR Series7 GPUs target applications from wearables to servers, reaching teraflop performance
Breaking News
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |