English
Samsung Describes 10nm SRAM
Area-optimized design shows 38% shrink
Rick Merritt, EETimes
2/4/2016 08:00 AM EST
SAN FRANCISCO – Samsung gave a peek at its 10nm finFET technology and an advanced 128 Mbit SRAM made in the process in a paper at the International Solid-State Circuits Conference (ISSCC) here.
A version of the new 6T SRAM bitcell optimized for size is 38% smaller than a similar part in Samsung’s 14nm process. It measures 0.040mm2 compared to 0.049mm2 for a version optimized for high current.
SRAMs take up as much as 30% of mobile applications processors and smaller size is generally a welcome indication of lower cost per transistor, Samsung noted. However in the case of the 10nm SRAM, small size created a problem.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related News
- sureCore PowerMiser Low Power SRAM IP Now on Samsung 28nm FDS Process Technology
- Efinix Partners with Samsung to Develop Quantum eFPGAs on 10nm Silicon Process
- Samsung Starts Mass Production of Its 2nd Generation 10nm FinFET Process Technology
- Cadence DFM Signoff Solutions Achieve Qualification for Samsung 28nm FD-SOI/14nm/10nm Process Technologies
- Rambus Partners with Samsung to Develop 56G SerDes PHY on 10nm LPP Process
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards