Open-Silicon to Exhibit and deliver two Tech Talks at IP SoC 2016, Bangalore on Wednesday, April 6, 2016
March 30th, 2016 -- Open-Silicon, a system optimized ASIC solutions provider, will be exhibiting and delivering two tech talks at the D&R IP SoC 2016, Bangalore. Company will make two technical presentations on “IoT ASIC Platform” and “HBM IP Subsystem Ecosystem”. Besides tech talks company will also be demonstrating it’s IoT ASIC Platform and HMC 2.0 Memory Controller ASIC IP. Visit our booth on exhibit floor to view the demos and to learn about our company’s other ASIC solutions including HBM IP, Interlaken IP.
Exhibits:
- IoT ASIC Platform- This demonstrates end-to-end communication between sensor hubs and cloud platform through a gateway device. Depending upon the type of radio technology, the sensor hubs can be used outdoors, on the factory floor or inside a room. The Industrial IoT system setup is a part of Open-Silicon’s Spec2Chip IoT Platform, which allows IoT ASIC designs to be evaluated at system level.
-
HMC 2.0 Memory Controller ASIC IP- This IP demo will showcase a platform based on Xilinx Virtex-7 XC7VX690T FPGA that includes a fully validated design that integrates HMC controller along with HMC exerciser functions. The demo platform allows quick evaluation of the HMC technology and performance testing of the HMC links.
Solutions:
Comprehensive HBM Gen2 IP Sub-system Solution. The solution is now available for 2.5D ASIC design starts and also as licensable Intellectual Property (IP). Open-Silicon’s IP is fully complies with the HBM-Gen2 JEDEC® standard. The IP translates user requests into HBM command sequences (ACT, Pre-Charge) and handles memory refresh, bank/page management and power management on the interface. The IP includes the PHY and custom die-to-die IO needed to drive the interface between the logic-die and the memory die-stack on the 2.5D Interposer.
Tech Talks:
Open-Silicon will present on following two topics in the conference:
- Topic: ”HBM IP Subsystem Ecosystem”
Time: 14:00 - Session 2a – Interfaces to Subsystem - Topic: ”IoT ASIC design using Platforms and IP Ecosystem”
Time: 15:45 - Session 3a – Security and IoT
WHEN: Wednesday, April 6, 2016,
Time: 9:00a.m. – 5:00p.m.
WHERE: Booth on exhibit floor,
Hotel Park Plaza, 90/4,
Outer Ring Road, Marathahalli village,
Bengaluru, Karnataka 560037, India.
About Open-Silicon
Open-Silicon transforms ideas into system-optimized ASIC solutions within the time-to-market parameters desired by customers. The company enhances the value of customers’ products by innovating at every stage of design – architecture, logic, physical, system, software and IP – and then continues to partner to deliver fully tested silicon and platforms. Open-Silicon applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software, packaging, manufacturing and test capabilities. The company has partnered with over 150 companies ranging from large semiconductor and systems manufacturers to high-profile start-ups, and has successfully completed 300 designs and shipped over 110 million ASICs to date. Privately-held, Open-Silicon employs over 250 people in Silicon Valley and around the world. www.open-silicon.com
|
Related News
- Open-Silicon to Showcase its Spec2Chip IoT SoC Platform Solution Consisting of IoT Edge SoC Platform and IoT Gateway SoC Platform at IoT DevCon Santa Clara on April 26-27, 2017
- Open-Silicon to Showcase Breadth of ASIC Solutions at CDNLive 2016, Bangalore, India
- Open-Silicon and Virage Logic Partner to Deliver Silicon Proven IP for SoC Design
- Open-Silicon to Demonstrate and Present on Custom SoC Platform Solutions for AI Applications at the TSMC OIP Event in Santa Clara
- Open-Silicon to Demonstrate its High Bandwidth Memory (HBM2) IP Subsystem Solution for High Performance Computing and Networking Applications and Showcase its IoT Gateway SoC Reference Design for Smart City Applications at ARM TechCon 2017
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |