MIPS Technologies Partners with Synopsys to Provide DesignWare Users Easy Access to MIPS-Based[tm] SoC Design Environment
MIPS Technologies Partners with Synopsys to Provide DesignWare Users Easy Access to MIPS-Based[tm] SoC Design Environment
DesignWare Users Can Now Evaluate and Implement SoC Designs based on
MIPS Technologies' Next-Generation 32-bit Family of Synthesizable Cores
MOUNTAIN VIEW, Calif., October 1, 2001 - More than 25,000 design engineers who use the Synopsys, Inc. (Nasdaq: SNPS) DesignWare® IP library to jump-start their designs will soon have access to the MIPS Technologies, Inc. (Nasdaq: MIPS, MIPSB) highly configurable and synthesizable MIPS32[tm] 4KE[tm] family of synthesizable processor cores. The MIPS® core family will be incorporated in the industry's leading IP library from Synopsys.
The DesignWare library is being expanded to provide designers with a complete, easy-to-use MIPS-based[tm] SoC design environment on their desktops. In addition to the 4KE family of low-power synthesizable cores, the library contains an array of popular, pre-verified peripheral IP blocks that are easily connected to the MIPS cores using the DesignWare AMBA-based microprocessor sub-system. The complete package can then be used as the basis for SoC design with a high degree of confidence of obtaining working first-pass silicon.
"The top three design challenges hardware engineers face with microprocessors is finding IP that is easy to access, easy to evaluate and easy to implement," said Kevin Meyer, vice president of marketing at MIPS Technologies. "By collaborating with Synopsys to help solve these critical systems issues, we bring the power of the industry-standard MIPS architecture to designers' desktops. This is another key step forward in achieving 'right first-time' design."
"We are pleased to offer our DesignWare users the ability to access MIPS Technologies' next-generation 32-bit core family for their SoC designs," said Phil Dworsky, director of marketing and business development, IP & Systems Group at Synopsys. "The MIPS32 4KE processor core family is highly configurable and fully synthesizable, which meets our stringent guidelines for synthesis and the re-use of IP."
The MIPS32 4KE Family of Processor Cores
The 4KE family of processor cores not only delivers 1.4 Dhrystone MIPS/MHz of performance, but also provides many configurable options that allow the designer to optimize the core for their application resulting in increased performance while reducing die size and power consumption and, ultimately, total system cost. The MIPS32 4KE family of cores consists of the 4KEc[tm], 4KEm[tm] and 4KEp[tm] configurations. The 4KEc has been designed for use in cost-sensitive digital consumer applications and contains a memory management unit for supporting multi-processing operating systems. The 4KEm is equipped with a single-cycle multiply-accumulate unit for efficient execution in broadband access systems. The 4KEp is used in a variety of low-power performance communications applications such as highly integrated networking cards and mobile devices. Features such as 128 kilobytes of cache and a coprocessor interface allow users to easily configure a 4KE core to maximize performance in their SoC applications. MIPS16e[tm] code compression can reduce memory requirements by up to 40 percent, further reducing system costs, and extensive clock gating significantly reduces power consumption. The cores' real-time trace capability supports software development and debugging with the industry's most popular tool chains. The 4KE cores include an integrated test suite and will be delivered in both Verilog and VHDL to licensees through DesignWare.
Design views for the MIPS core family, used to perform design, simulation and verification, will be available to DesignWare licensees as part of the DesignWare Star IP program. Full implementation views, including RTL, will be available for licensing from MIPS Technologies and delivered by Synopsys. Design and implementation support will be provided by Synopsys.
About Synopsys DesignWare IP Library
DesignWare is the world's leading IP library, in use by more than 25,000 designers. It provides designers with Implementation IP consisting of more than 140 technology-independent components and Verification IP consisting of Bus-Functional Models, Bus Interface Models, and more than 18,500 other verification models, plus MemPro for memory model generation. DesignWare also provides access to high-value IP from leading Star IP providers. Information for DesignWare can be found at www.synopsys.com/designware/.
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS), headquartered in Mountain View, California, creates leading electronic design automation (EDA) tools for the global electronics market. The company delivers advanced design technologies and solutions to developers of complex integrated circuits, electronic systems and systems on a chip. Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers. Visit Synopsys at www.synopsys.com.
About MIPS Technologies
MIPS Technologies, Inc. is a leading provider of industry-standard processor architectures and cores for digital consumer and network applications. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC solutions. The company licenses its intellectual property to semiconductor companies, ASIC developers and system OEMs. MIPS Technologies and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. The company is based in Mountain View, Calif., and can be reached at +1 (650) 567-5000 or www.mips.com.
MIPS Media Contact: Gerry Ziegler MIPS Technologies, Inc. +1 (650) 567-5059 zig@mips.com Gustavo Santoyo | Synopsys Media Contacts: Troy Wood Synopsys, Inc. 650-584-5717 twood@synopsys.com Amy Garland |
###
MIPS® is a registered trademark in the United States and other countries, and MIPS32[tm], 4KE[tm], 4KEp[tm], 4KEm[tm], 4KEc[tm], MIPS16e[tm] and MIPS-based[tm] are trademarks of MIPS Technologies, Inc. All other trademarks referred to herein are the property of their respective owners.
Synopsys and DesignWare are registered trademarks of Synopsys, Inc.
Related News
- MIPS Technologies, Intrinsix Alliance Offers SoC Design Services for MIPS-Based[tm] Solutions
- MIPS Technologies and IN2FAB Technology Team to Deliver Optimized Solutions for MIPS-based[tm] SOC Design
- MIPS Technologies and DMP Collaborate on Android(TM) Development for MIPS(R) Architecture
- Shanghai's Opulan Technologies Extends Commitment to MIPS-Based(TM) SoC Design With Hard Core License
- MIPS Technologies Unveils New SOC-it(R) Platform Strategy for MIPS-Based(TM) SoCs
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |