Synopsys' New USB 2.0 Type-C IP Cuts Power and Area for IoT Edge Applications
DesignWare IP Reduces USB Silicon Area by Up to 50 Percent with Near 0 W Standby Power Consumption for Longer Battery Life
MOUNTAIN VIEW, Calif. -- July 13, 2016 -- Synopsys, Inc. (Nasdaq:SNPS) today announced it has reduced the power and area of its DesignWare® USB 2.0 Type-C Controller and PHY IP for cost-sensitive and energy-efficient Internet of Things (IoT) edge applications targeting 40-nanometer (nm) and 55-nm ultra-low power processes. The IP cuts silicon area by up to 50 percent compared to competitive offerings, saving on average $0.03 per die. To extend battery life, the USB IP uses 30 percent lower active power compared to competing solutions and near 0 W of standby power. The DesignWare USB 2.0 Type-C IP supports the IEEE 1801 standard Unified Power Format (UPF) to speed implementation and testing of power domains. In addition, Synopsys has simplified configuration options in the IP to reduce integration and verification effort by weeks or months.
"To meet our customers' stringent power and area requirements, our SoCs, which incorporate USB 2.0 functionality, must be significantly smaller and consume less power than competing options," said SJ Choi, senior vice president, head of digital TV SoC R&D at SIC center, LG Electronics. "As the leader in USB IP, Synopsys understands our design challenges and consistently delivers USB solutions that meet our exact needs. Their IP, combined with their long track record of USB compliance and proven interoperability, allows us to mitigate our design risk and achieve first silicon success."
"The continued proliferation of IoT edge devices requires more data to be delivered through USB interfaces with minimal power consumption in an extremely small form factor," said Jeff Ravencraft, USB-IF president and COO. "Synopsys' USB 2.0 IP solution has been specifically designed and optimized to address these requirements, which is critical for designers to quickly and easily integrate USB functionality into their IoT SoCs."
The DesignWare USB 2.0 Type-C Host, Device and Dual-Role Device Controllers and PHYs are based on Synopsys USB 2.0 IP that has been certified more than 90 times and integrated in thousands of SoC designs shipping in billions of chips. The new DesignWare USB solution supports the USB Battery Charging v1.2 specification, delivering up to 1.5 A of current to IoT devices connected to a wall charger. In addition, the DesignWare USB 2.0 Type-C IP supports advanced power management features, such as power supply gating and support for near 0 W standby current, to help designers reduce leakage for IoT devices. For the fastest, most efficient IC development, the IP eliminates the 80 percent of standard USB 2.0 configuration options that are not essential to IoT systems. In addition to the DesignWare USB 2.0 Type-C Controllers and PHYs, Synopsys offers IP prototyping kits, IP software development kits and verification IP to enable early software development, reduce IP integration risk and speed time-to-market.
"Reducing energy consumption and system costs are critical for IoT applications," said John Koeter, vice president of marketing for IP and prototyping at Synopsys. "Synopsys is delivering a broad range of DesignWare IP optimized specifically for IoT applications, including the new USB 2.0 Type-C IP, to help designers extend battery life, reduce costs and enable additional functionality in their products."
Availability & Resources
The DesignWare USB 2.0 Type-C IP for IoT is available now in ultra-low power 40-nm and 55-nm processes. DesignWare USB IP prototyping kits, IP software development kits and verification IP are also available now.
- Learn more about DesignWare USB IP: www.synopsys.com/usb
- Learn about all of the DesignWare IP for IoT: https://www.synopsys.com/IP/market-segments/iot/Pages/default.aspx
- Read the "To USB or Not to USB" blog: https://blogs.synopsys.com/tousbornottousb/
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit http://www.synopsys.com/designware.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at http://www.synopsys.com/.
|
Synopsys, Inc. Hot Verification IP
Related News
- Synopsys' New Silicon-Proven DesignWare USB 3.0 and USB 2.0 femtoPHY IP Cut Area by 50 Percent
- Synopsys Unveils 30 Percent Smaller Area, Low Power USB 2.0 PHY IP for 28-nm Processes
- Synopsys' New Designware USB 2.0 nanoPHY IP to Cut Power and Size in Half
- VESA Releases Updated DisplayPort Alt Mode Spec to Bring DisplayPort 2.0 Performance to USB4 and New USB Type-C Devices
- ASIX Adopts Synopsys' USB Type-C Subsystem Verification Solution
Breaking News
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PiMCHIP Deploys Ceva Sensor Hub DSP in New Edge AI SoC
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
Most Popular
- DENSO and U.S. Startup Quadric Sign Development License Agreement for AI Semiconductor (NPU)
- Xiphera and Crypto Quantique Announce Partnership for Quantum-Resilient Hardware Trust Engines
- Arm's power play will backfire
- Alchip Announces Successful 2nm Test Chip Tapeout
- Faraday Unveils HiSpeedKit™-HS Platform for High-speed Interface IP Verification in SoCs
E-mail This Article | Printer-Friendly Page |