Amba on-chip bus is core link for Synopsys
Amba on-chip bus is core link for Synopsys
By Chris Edwards, EE Times UK
October 2, 2001 (12:12 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010928S0019
Synopsys has decided to adopt ARM's Amba on-chip bus as the favoured way to link the main cores in its DesignWare library of intellectual property (IP). The California-based EDA firm plans to use Amba to make it easier to incorporate 'star IP' cores, such as processors, in DesignWare. But the company has decided to stick with its existing yearly subscription model for DesignWare by only including models for ARM, MIPS and other processors, not the cores themselves. Customers will have to negotiate licensing terms with IP suppliers, although Synopsys will provide design views for early evaluation. Phil Dworsky, director of marketing and business development for Synopsys, said: "There are three partners who are full partners: Infineon, mips and NEC. We are working with them to make their cores fully reusable. We are packaging them to make them work with the [Amba] on-chip bus. Once the licence is secured, we will deliver the RTL [hardware design]." Synopsys will provide ARM's simulation models but the UK processor cores company is only 'endorsing' Synopsys' approach. Dworsky says Synopsys will port larger cores, such as PCI and PCI-X bus interfaces, to Amba: "We have a separate development on Amba subsystems. They are peripherals such as timers, interrupt controllers and Uart." The company is looking for other suppliers "with IP complementary to DesignWare" to join the programme. Synopsys will support version 2.0 of the Amba specification initially. Cores for the switch-fabric version, multi-layer Amba hardware bus (AHB), and AHB Lite, will arrive in mid-2002.
Related News
- Synopsys Introduces Lower Power, High-Performance Architecture for AMBA 3 AXI On-Chip Interconnect
- TEMENTO SYSTEMS announces the introduction of a Bus Trace Analyzer for On-Chip AMBA and ARM processor-based Verification
- NetSpeed Systems to Bring its Next-Generation Cache Coherency to Enterprise Market with Extended ARM License
- Synopsys Introduces Industry's First On-Chip Memory Test and Repair Solution for Embedded Flash
- Synopsys PrimeTime Advanced On-chip Variation Analysis Enables Renesas to Accelerate Timing Closure at 65-nm and Below
Breaking News
- Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
- Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
- VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
- ARM boost in $100bn Stargate data centre project
- MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
Most Popular
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
E-mail This Article | Printer-Friendly Page |