JEDEC Announces Annual Serial Presence Detect Enhancements
ARLINGTON, Va., USA – AUGUST 16, 2016 – JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, has announced that its JC-45 Committee has approved the 2016 annual release of codes for the Serial Presence Detect (SPD) for DDR4/DDR4E and for LPDDR3/LPDDR4. The SPD is an EEPROM present on all JEDEC standard memory modules that contains codes read by the host computer to determine critical functions and timing supported by the memory module. SPD4.1.2.L-4 (for DDR4/DDR4E) and SPD4.1.2.M-2 (for LPDDR3/LPDDR4) are both available for free download from the JEDEC website.
“Embedded SPD codes in solder down applications have also become exceptionally popular in computing devices,” said Mian Quddus, Chairman of the JC-45 Committee on DRAM Modules. “This annual release of new SPD codes helps the industry keep abreast of the latest DRAM advances while maintaining backward compatibility.”
The 2016 release of the DDR4 SPD Contents specification includes support for second generation Registered modules and Load Reduced modules, with increases in operation speed to 3200 Mbps through addition of Decision Feedback Equalization control bytes. The SPD revision level remains unchanged for UDIMMs at revision 1.1, however revision levels for other modules types have increased: RDIMM and LRDIMM module SPD revisions increase to revision 1.2 and the revision for NVDIMMs increases to revision 1.1.
The 2016 release of the LPDDR3/LPDDR4 SPD Contents also changes the revision levels to 1.1 with the addition of support for a greater number of channels for high capacity, high throughput systems.
About JEDEC
JEDEC is the global leader in the development of standards for the microelectronics industry. Thousands of volunteers representing nearly 300 member companies work together in 50 JEDEC committees to meet the needs of every segment of the industry, manufacturers and consumers alike. The publications and standards generated by JEDEC committees are accepted throughout the world. All JEDEC standards are available for free download from the JEDEC website. For more information, visit www.jedec.org.
|
Related News
- JEDEC Releases New Standard for LPDDR5/5X Serial Presence Detect (SPD) Contents
- JEDEC Announces Publication of the SPD5118 Hub and Serial Presence Detect Device and the DDR5 SPD Contents Specifications
- JEDEC Announces Publication of Serial Presence Detect Support and Module Labels Specifications to Support New Hybrid Memory (NVDIMM)
- JEDEC Announces Publication of Release 6 of the DDR3 Serial Presence Detect Standard
- JEDEC Publishes New Standard for Serial NOR Flash
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |