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Chip Process War Heats Up
Rick Merritt, EETimes
9/12/2016 09:00 PM EDT
SAN JOSE, Calif. – Although volumes are still small, fully depleted silicon-on-insulator could grow rapidly in the wake of Globalfoundries’ plans for a 12nm process. Whether Samsung or a new fab coming up in Shanghai will adopt FD-SOI will be a big factor, said veteran market watcher Handel Jones of International Business Strategies.
Ironically in a semiconductor industry traditionally focused on the next big thing, the aging 28nm node is likely to be the biggest process off all through 2025, according to the current IBS forecast.
The FinFET processes adopted by top chip makers Intel, Samsung and TSMC provide the highest performance and lowest power consumption. However in a 14nm equivalent, FD-SOI supports 16.8% lower cost per gate than FinFETs, Jones said. It also provides about 25% lower design cost and risk of needing a re-spin, he added.
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