5V Library for Generic I/O and ESD Applications TSMC 12NM FFC/FFC+
Cadence Delivers 10 New VIP Solutions to Accelerate Time to Market for Applications Based on Critical New Standards
Addresses leading-edge protocols across mobile, enterprise networking, automotive and consumer applications
SAN JOSE, Calif. -- Oct 10, 2016 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), today announced the release of 10 new Verification IP (VIP) solutions that allow engineers to quickly verify that designs meet specifications for the latest standard protocols. This extension of Cadence’s leading VIP portfolio supports growth in high-bandwidth applications including video on demand, cloud computing, big data and high resolution video used in the automotive, mobile, enterprise networking and consumer industries. Cadence® VIP supports all verification languages and any simulator or methodology. For more information on Cadence’s VIP portfolio, visit www.cadence.com/go/10vip.
“By providing the VIP and tools needed for customers to design to the newest Ethernet standards, Cadence helps expand the Ethernet ecosystem, enabling new products from new industries to enter the market,” said John D’Ambrosia, chairman of the Ethernet Alliance.
The new VIP solutions are for the following standard protocols:
- Ethernet 400G -- The highest performance Ethernet standard critical for enterprise networking to support the increasing bandwidth needs of video on demand, cloud computing and big data applications.
- Ethernet TSN -- A new set of specifications ideal for low-latency applications, such as real-time audio/video streaming, that require time-sensitive communication necessary in automotive and industrial automation. Cadence will be the first in the industry to support this specification.
- SPI NAND and Octal SPI -- Critical new memory protocols for automotive and industrial applications that provide higher density performance with the same footprint as previous generations.
- UFS 2.1 -- Improves data security through the use of inline cryptography between the SoC and UFS Storage device.
- USB Type-C -- Enables power delivery, alternate modes and high-speed data over a single connector for consumer and mobile applications.
- DisplayPort (1.3, 1.4) and Embedded DisplayPort (eDP 1.4a, 1.4b) -- For 8K resolution and scaling at reduced power envelopes for consumer and mobile applications.
- Display Stream Compression (DSC) -- Enables real-time, visually lossless image compression for consumer and mobile applications.
- MIPI DSI-2 -- For a high-speed, low-power-consumption interface between a peripheral and a host for consumer applications.
- CSI 2 2.0 -- For a high-speed, robust, scalable, low-power and cost-effective camera interface that supports a wide range of imaging for mobile applications.
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at www.cadence.com.
|
Cadence Hot IP
Related News
- Cadence Delivers 13 New VIP and Expands System VIP Portfolio to Accelerate Automotive, Hyperscale Data Center and Mobile SoC Verification
- Cadence Expands System and SoC Verification Offerings to Accelerate System Integration and Reduce Time to Market
- Cadence VCC 2.0 Delivers New Modeling Capabilities for Platform-based Design, Optimizing Time-to-market and SoC Design Chain Interaction
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- sureCore and Intrinsic announce collaboration to accelerate time to market for innovative ReRAM technology
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |