TriCN introduces low power LVDSinterface
Networking interface bandwidth performance exceeds NPSI requirements
SAN FRANCISCO, CA –October 21, 2002 –TriCN, a leading developer of intellectual property (IP) for high-speed semiconductor interface technology, today announced the immediate availability of its new Low Power LVDS (Low Voltage Differential Signal) interface. TriCN's Low Power LVDS operates at nearly half the power demands of a standard LVDS I/O, with bandwidth performance capabilities in excess of the NPSI (Network Processor Streaming Interface) requirement.
"Chip designer's are always looking for any advantage they can gain in reducing power requirements, while increasing performance," Ron Nikel, Chief Technology Officer of TriCN. " The power savings and bandwidth performance capacity of TriCN's Low Power LVDS will be particularly attractive to developers of network processor chips, or any systems designer looking to reduce overall power demands."
Bandwidth Performance
TriCN's new Low Power LVDS I/Os are not only NPSI compliant, but also provide a maximum operating bandwidth of 1.5 Gb/s, exceeding the data transmission requirements of the NPSI standard. The I/Os are self-terminating with built-in PVT (Process Voltage Temperature) compensation, and there are no external components required.
Availability
TriCN's Low Power I/O solution is available immediately for flip chip and bond wire applications in several variations of the TSMC 0.13um process, including 1.0V core supply (low voltage) process.
About TriCN
Founded in 1997, San Francisco, California-based TriCN is a leading developer of high- performance semiconductor interface intellectual property (IP). The company provides a complete portfolio of IP for maximizing data throughput on and off the chip. This IP is designed for IC developers addressing bandwidth-intensive applications, in the communications, networking, data storage, and memory space. TriCN's IP answers these challenges by delivering validated, industry-leading I/O performance and bandwidth density while dramatically streamlining design complexity and time-to-market. TriCN's customers range from startup to established fabless semiconductor and systems companies, including Philips, MIPS Technologies, SGI, IBM, Cognigine, Internet Machines, and Apple Computer.
For more information, please visit TriCN's web site at www.tricn.com.
|
Related News
- Ceva Introduces its Next Generation Low Power Ultra-Wideband IP for FiRa 2.0 to Provide Highly Accurate and Reliable Wireless Ranging Capabilities for Consumer and Industrial IoT Applications
- Wi-Fi Alliance introduces low power, long range Wi-Fi HaLow
- CEVA Introduces New Low Power Communication DSPs to Address the Multimode Connectivity Requirements of IoT and M2M
- Archband Introduces Low Power 100dB Audio & Voice CODEC IP
- Kandou Introduces High Bandwidth, Low Power, In-Package Chip Interconnect Enabling Lower Cost Semiconductor Solutions
Breaking News
- Silicon Proven AV1 Decoder IP with support for 12-bit pixel size and 4:4:4 Chroma Sub-Sampling Released by Allegro DVT
- Cadence Enables Next-Gen AI and HPC Systems with Industry's Fastest HBM4 12.8Gbps IP Memory System Solution
- S2C and Andes Technology Announce FPGA-Based Prototyping Partnership to Accelerate Advanced RISC-V SoC Development
- PQShield launches UltraPQ-Suite for deeply specialized implementations of post-quantum cryptography
- Andes Technology and Imagination Technologies Showcase Android 15 on High-Performance RISC-V Based Platform
Most Popular
- Certus Semiconductor Joins TSMC IP Alliance Program to Enhance Custom I/O and ESD Solutions
- Cadence to Acquire Arm Artisan Foundation IP Business
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New Breakthroughs in China's RISC-V Chip Industry
- Ceva Neural Processing Unit IP for Edge AI Selected by Nextchip for Next-Generation ADAS Solutions
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |