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TSMC Calls for New EDA Paradigm
Rick Merritt, EETimes
2/6/2017 01:45 PM EST
SAN FRANCISCO – Engineers need a new class of tools to keep up with the complexity of designing today’s semiconductors, said a keynoter at the International Solid State Circuits Conference (ISSCC) here Monday (Feb. 6). Separate tools need to target today’s four major markets using new techniques and assumptions including machine learning, said Cliff Hou, vice president of R&D at TSMC.
“We need a new design paradigm to overcome chip design challenges,” said Hou. “It’s time for us to evolve our design paradigm, we’ve only covered a small portion of” the design space, he said.
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