Save time during the evaluation of silicon IPs thanks to MyDolphin
Grenoble, France – February 20, 2017 -- Succeeding in dynamic markets like MCUs, wireless communication, IoT, wearables… requires, from Fabless makers, to react fast so as to deliver a SoC with the right specifications in a timely manner. As a result, project leaders, SoC architects and design engineers are confronted with the challenge of selecting the best silicon IPs within very short time frames.
To help our customers assess the worth of its coherent set of silicon IPs fast and objectively, Dolphin Integration has developed and continuously enriched MyDolphin, a dedicated resource center. Registered Fabless companies now have immediate access to the relevant materials to assess the worth of our DELTA offering of voltage regulators in processes ranging from 180 nm to 22 nm.
Why register to MyDolphin?
MyDolphin is continuously enriched with materials to perform a performance assessment quickly and objectively. It includes the offering from Dolphin Integration for dense and low-power memories, for dense and low power standard cell libraries, for innovative audio features and, the most complete library of voltage regulators. It provides easy access, through a dedicated private space, to useful data for SoC designers, including:
- Product datasheets and detailed specifications
- Evaluation kits
- Product-independent benchmarks
- Recordings of webinars on advanced design techniques (with related Q&A)…
Fabless companies also benefit from guidance from expert engineers in Application and in SoC Architecture. Dolphin Integration experts help you select the best set of silicon IPs to enhance the competitiveness of your SoC, and to assess, with the relevant metrics, their worth in terms of area reduction, BoM cost savings, power consumption minimization, TTM improvement…
Interested in our dedicated resource center, providing fast support to your innovations? Register now here.
To know more about MyDolphin, click here to access our Q&A. You can also ask specific questions using the registration form.
About Dolphin Integration
Dolphin Integration contributes to "enabling low-power Systems-on-Chip" for worldwide customers - up to the major actors of the semiconductor industry - with high-density Silicon IP components best at low-power consumption.
"Foundation IPs" includes innovative libraries of standard cells, register files and memory generators as well as an ultra-low power cache controller. "Fabric IPs" of voltage regulators, Power Island Construction Kit and their control network MAESTRO enable to safely implement low-power SoCs with the smallest silicon area. They also star the "Feature IP": from ultra-low power Voice Activity Detector with high-resolution converters for audio and measurement applications to power-optimized 8 or 16 and 32 bit micro-controllers.
Over 30 years of experience in the integration of silicon IP components, providing services for ASIC/SoC design and fabrication with its own EDA solutions, make DOLPHIN Integration a genuine one-stop shop addressing all customers' needs for specific requests.
It is not just one more supplier of Technology, but the provider of the DOLPHIN Integration know-how!
|
Dolphin Design Hot IP
Related News
- Chipus demonstrates silicon proven high performance IPs during Brazilian symposium on microelectronics
- Silicon Creations Collaborates with Interex Semiconductor to Distribute High-Performance IPs in India
- Delivering industry-leading solutions with Comprehensive Automotive Grade Silicon IP Portfolio with ISO 26262 and ASIL Certifications
- Rapid Silicon Introduces Revolutionary Rapid eFPGA Configurator for Hassle Free Embedded FPGA Evaluation
- Chiplet Pioneer Eliyan Achieves First Silicon in Record Time with Implementation in TSMC 5nm Process, Confirms Most Efficient Chiplet Interconnect Solution in the Multi-Die Era
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |