Sidense Exhibiting at TSMC 2017 North American Technology Symposiums
Update: Synopsys Expands DesignWare IP Portfolio with Acquisition of Sidense Corporation (Oct. 17, 2017)
Ottawa, Canada and San Jose, Calif. -- March 8, 2017 -- Sidense will be exhibiting at the North American TSMC Technology Symposiums (Santa Clara, CA, Austin, TX and Boston, MA). Speak to our friendly and knowledgeable staff at the Sidense booth to find out how Sidense low-cost, secure and reliable 1T-NVM non-volatile memory IP, available from 180nm to 20nm including HV and BCD process nodes, can be a key component in your Smart Connected designs to replace OTP and MTP in many applications.
Where and When
Santa Clara, CA
Wednesday, March 15, 9:30AM - 5:45PM
Santa Clara Convention Center
5001 Great America Pkwy
Santa Clara, CA 95054
Booth 201
Austin, TX
Wednesday, March 22, 9:30AM - 5:30PM
Four Seasons
98 San Jacinto Boulevard
Austin, TX 78701
Boston, MA
Wednesday, April 5, 9:30AM - 5:30PM
Marriott Burlington Boston
One Burlington Mall Road
Burlington, MA, 01803
For more information or to schedule a meeting with Sidense please contact:
Jim Lipman (jim@sidense.com, 925-606-1370) for Santa Clara, Mark Davitt (mdavitt@sidense.com, 408-497-9193) for Austin, or Craig Downing (cdowning@sidense.com, 613-986-5872) for Boston
About Sidense Corp.
Sidense Corp. provides very dense, highly reliable, and secure non-volatile Logic Non-Volatile Memory (LNVM) IP for one-time programmable (OTP) and emulated Multi-time Programmable (eMTP) use in standard-logic CMOS processes. The Company, with over 120 patents granted or pending, licenses OTP memory IP based on its innovative one-transistor 1T-Fuse™ bit cell, which does not require extra masks or process steps to manufacture. Sidense 1T-NVM macros provide a better field-programmable, reliable and cost-effective solution than flash, mask ROM, eFuse and other embedded and off-chip NVM technologies for many code storage, encryption key, analog trimming, and device configuration uses.
Over 150 companies, including many of the top fabless semiconductor manufacturers and IDMs, have adopted Sidense 1T-NVM as their embedded non-volatile memory solution for more than 500 designs. Customers are realizing outstanding savings in solution cost and power consumption along with better security and reliability for applications ranging from mobile and consumer devices to high-temperature, high-reliability automotive and industrial electronics. The IP is offered at and supported by all top-tier semiconductor foundries and selected IDMs. Sidense is headquartered in Ottawa, Canada with sales offices worldwide. For more information, please visit www.sidense.com.
About the TSMC Technology Symposiums
Join the 23rd annual TSMC Technology Symposium and get first-hand updates on TSMC's advanced and specialty technologies, advanced backend capabilities and future development plans.
|
Related News
- Sidense Exhibiting at TSMC 2016 North American Technology Symposiums
- Sidense Exhibiting at TSMC 2015 North American Technology Symposiums
- Sidense Exhibiting at TSMC 2014 North American Technology Symposiums
- Sidense Exhibiting Secure and Reliable 1T-OTP at TSMC 2016 China and Taiwan Symposiums
- TSMC FINFLEX™, N2 Process Innovations Debut at 2022 North American Technology Symposium
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |