English
Faster Networks Push Interface Development
Gary Hilson, EETimes
4/28/2017 05:01 PM EDT
TORONTO – As Ethernet speeds get faster, Rambus is looking to make sure memory and interfaces can keep up with the recent launch 56G SerDes PHY.
The analog-to-digital converter (ADC) and (DSP) architecture of the 56G SerDes PHY is designed meet the long-reach backplane requirements for the industry transition to 400 GB Ethernet applications, said Mohit Gupta, senior director of product marketing at Rambus. This means it can support scaling to speeds as fast as 112G, which are required in the networking and enterprise segments, such as enterprise server racks that are moving from 100G to 400G.
"Ethernet is moving faster than ever,” Gupta said. “The pace has picked up substantially due to big data, the Internet of Things (IoT) and other trends putting high demands on communication channels. There is already a forum for 112G SerDes speed which will drive the 800G standard.”
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Search Silicon IP
Related News
- Xilinx and China Mobile Research Institute Collaborate on Next Generation Fronthaul Interface Development for 5G Wireless Networks
- Ceva and Edge Impulse Join Forces to Enable Faster, Easier Development of Edge AI Applications
- 4DS Unveils New Interface Switching ReRAM Technology for Faster and Energy Efficient Memory for AI Processing
- M31 demonstrates high-speed interface IP development achievements on TSMC's 7nm & 5nm process technologies
- EnSilica evaluation platform for EN62020 sensor interface ASIC speeds up development of wearable fitness and healthcare sensor devices
Breaking News
- HPC customer engages Sondrel for high end chip design
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- TSMC drives A16, 3D process technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy