Xilinx Announces Integration of 56G PAM4 Transceiver Technology into its Virtex UltraScale+ FPGAs
Devices to accelerate next wave of Ethernet deployment for wired and data center interconnect
SAN JOSE, Calif. -- May 17, 2017 -- Xilinx, Inc. (XLNX) today announced integration of 56G PAM4 transceiver technology into its industry-leading Virtex® UltraScale+™ FPGAs. Built upon proven 16nm FinFET+ FPGA fabric, these devices will expand the Virtex product line to drive the next wave of Ethernet deployment and provide seamless migration of existing systems to next-gen backplane, optics, and high performance interconnects.
Targeted for wired communications, data centers, and wireless backhaul applications, the integrated devices enable customers to double bandwidth on existing infrastructure by breaking through the physical limitations of data transmission at 56G+ line rates.
"Xilinx is leading the charge on transceiver technology with the infusion of 56G PAM4 into our 16nm FPGAs," said Ken Chang, vice president, SerDes Technology Group at Xilinx. "These new devices are built upon a proven FPGA foundation and are in alignment with the vast ecosystem of optics, ASICs, and backplanes soon to be deployed."
Today's announcement signals another milestone for Xilinx transceiver leadership after the company was first to demonstrate 56G PAM4 transceiver technology on a 16nm programmable device in 2016. View the Xilinx 56G PAM4 technology demo and contact your local sales representative for more information.
About Xilinx
Xilinx is the leading provider of All Programmable semiconductor products, including FPGAs, SoCs, MPSoCs, RFSoCs, and 3D ICs. Xilinx uniquely enables applications that are both software defined and hardware optimized – powering industry advancements in Cloud Computing, 5G Wireless, Embedded Vision, and Industrial IoT. For more information, visit www.xilinx.com.
|
Search Silicon IP
Xilinx, Inc. Hot IP
Related News
- Xilinx Announces General Availability of Virtex UltraScale+ FPGAs in Amazon EC2 F1 Instances
- Xilinx Unveils Details for New 16nm Virtex UltraScale+ FPGAs with High Bandwidth Memory and CCIX Technology
- Xilinx Announces the World's Largest FPGA Featuring 9 Million System Logic Cells
- StreamDSP Serial FPDP Now Supports Xilinx UltraScale+ and Altera Stratix-10 FPGAs
- Enyx Premieres 25G TCP and UDP Offload Engines with Xilinx Virtex UltraScale+ 16nm FPGA on BittWare's XUPP3R PCIe Board
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |