Cadence Custom/Analog, Digital and Signoff Tools Achieve Certification on Samsung 28FDS Process Technology
Reference flow enables system and semiconductor companies to accelerate delivery of IoT and mixed-signal designs on Samsung’s process
SAN JOSE, Calif., 24 May 2017 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced its custom/analog tools and full-flow digital and signoff tools have achieved certification for the process design kit (PDK) and foundation library for the Samsung Electronics’ 28nm fully depleted silicon-on-insulator (FDS), also known as FD-SOI, process technology. The Cadence® 28nm FDS reference flow has been certified by Samsung using a quad-core design with the ARM® Cortex®-A53 processor covering forward body bias (FBB) with a bias controller, a power-gating scheme, UPF2.1 compliance, multi-bit FF optimization, scan/PMBIST/ATPG and SI/EM-aware design.
To learn more about the Cadence full-flow digital and signoff solutions, visit www.cadence.com/go/samsung28fdsdands. For information about the Cadence custom/analog solutions, visit www.cadence.com/go/samsung28fdscanda.
The integrated, automated Cadence custom/analog tools and full-flow digital and signoff tools meet Samsung’s accuracy requirements, enabling foundry customers to quickly achieve design closure and deliver complex IoT and mixed-signal designs faster using the 28FDS process. In addition, the Cadence tools have been certified for tapeout using Samsung’s certification criteria for baseline accuracy.
The digital and signoff tools in the design flow include the Innovus™ Implementation System, Genus™ Synthesis Solution, Quantus™ QRC Extraction Solution, Conformal® Logic Equivalence Checking (LEC), Conformal Low Power, Tempus™ Timing Signoff Solution, Voltus™ IC Power Integrity Solution, Cadence Physical Verification System, Cadence Litho Physical Analyzer (LPA), Cadence CMP Predictor (CCP), Cadence LDE Electrical Analyzer (LEA) and Modus™ Test Solution. The custom/analog tools in the flow include the Spectre® Accelerated Parallel Simulator (APS), Spectre Extensive Partitioning Simulator (XPS), Spectre RF Simulator, Virtuoso® Schematic Editor, Virtuoso Analog Design Environment and Virtuoso Layout Suite.
“Samsung Foundry and Cadence collaborated on this new reference flow to provide mutual customers with a fast path to design closure,” said Jaehong Park, senior vice president of the Foundry Design Team at Samsung Electronics. “Using the certified Cadence custom/analog tools and full-flow digital and signoff tools with the Samsung 28FDS process enables engineers to efficiently deliver innovative IoT and mixed-signal designs to market.”
“Our tool sets allow customers to optimize the low-power/high-performance SOI tradeoffs required to meet the diverse end-use demands of the marketplace,” said Tom Beckley, senior vice president and general manager of the Custom IC & PCB Group at Cadence. “Through Samsung Foundry’s certification of our full-flow digital and signoff tools and custom/analog tools, our customers can create reliable designs using the 28FDS process.”
About Cadence
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.
|
Cadence Hot IP
Related News
- Cadence Digital, Custom/Analog and Signoff Tools Achieve TSMC Certification for 10nm FinFET Process
- Cadence Digital, Signoff and Custom/Analog Tools Enabled on Samsung's 7LPP and 8LPP Process Technologies
- Cadence Digital and Custom/Analog Tools Achieve TSMC Certification for 16FF+ Process, Companies Collaborate on 10nm FinFET
- Cadence Digital and Custom/Analog Tools Achieve TSMC V1.0 DRM Certification for 16nm FinFET Process
- Cadence Digital and Signoff Full Flow and Custom/Analog Tools Certified for TSMC N6 and N5/N5P Process Technologies
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
E-mail This Article | Printer-Friendly Page |