Sankalp Semiconductor Announces Availability of 16nm IO Libraries
Austin, TX -- June 19, 2017 -- Sankalp Semiconductor a design service company offering comprehensive mixed signal and SoC solutions today announced the availability of its 16nm IO library. Sankalp will highlight the16nm IO library solution at its booth (#1915) during the Design Automation Conference (DAC), June 19-21 in Austin, Texas. The company provides one-stop solution for chip designer for a variety of IO and custom mixed signal IP needs. The 16nm IO library is an addition to Sankalp’s portfolio of IOs that include solutions for process nodes spanning from 16nm to 130nm technologies.
“The IO solution offerings complements our analog and mixed signal expertise. Our customers derive value by getting their entire semiconductor needs fulfilled from a single technology services provider,” said Vijay Pathak, CTO Mixed Signal, Sankalp Semiconductor. “Sankalp supports customers with analog IP building blocks, digital design, verification and SoC design services. We are committed to investment in building the GPIOs for new technologies across the foundries so that these could be leveraged to build application specific high bandwidth interface solutions by our customers.”
Sankalp’s 16nm IO is compliant with ANSI/TIA/EIA-644- A-2001 and IEEE 1596.3-1996 Standard for LVDS Scalable Coherent Interface architecture. The IO's offers superior design performance with high immunity to ESD and latchup. The IOs are power supply sequence independent. The LVCMOS IO is compatible with JEDEC LVCMOS18 specification. It supports Fail-safe feature for the OD variant along with Over-Voltage tolerance. All the IO's are tested for reliability robustness. Each IO supports ease of test-ability with Test Bus Pad.
Sankalp’s high performance IO architecture comes with a complete set of deliverables that include Verilog, .lib, CDL netlist, LEF, ibis, GDSII and detailed documentation. The design includes signal, power and specialty pads. The specialty pads include Test Bus Pad, spacers; corners and other IO ring create cells. The I/O module, in addition to signal and power pads also includes custom pads for test bus, spacers, corners and other IO ring create cells.
About Sankalp Semiconductor
Sankalp Semiconductor offers an integrated portfolio of services and solutions to its customers in key semiconductor domains including digital, analog, high-speed physical interface IP, Embedded Memory Compiler and EDA modelling. Sankalp Semiconductor is a preferred semiconductor design service partners to multiple Fortune 500 companies in the Automotive, Consumer Electronics, Industrial IoT and Medical electronics space. The company enables its customers achieve their time-to-market window by delivering first pass silicon designs and engage with product engineering teams across the globe to design System-on-Chip. Sankalp Semiconductor is based in Sunnyvale, California, with multiple development and services centers in India, Canada and Germany. www.sankalpsemi.com
|
Related News
- Sankalp Semiconductor Announces Availability of Automated Analog Validation Services Environment - SAVE
- Achronix Announces Speedster7t AC7t1500 FPGA General Availability
- SkyWater Announces Availability of SRAM Memory Compiler for 90 nm Strategic Rad Hard by Process Offering
- Brite Semiconductor Releases ONFI 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process
- Gowin Semiconductor Announces AEC-Q100 Automotive Grade FPGA Availability
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |