NurLogic Partners With MOSIS to Offer Standard Cell and I/O Library Components With Low Volume Wafer Accessibility At Leading Foundries
NurLogic Partners With MOSIS to Offer Standard Cell and I/O Library Components With Low Volume Wafer Accessibility At Leading Foundries
SAN DIEGO--(BUSINESS WIRE)--Sept. 17, 2001-- NurLogic Design, Inc., a developer of high-bandwidth connectivity solutions, today announced that it has signed an agreement with MOSIS to offer NurLogic's intellectual property (IP) to its customers. Through this agreement, MOSIS customers have access to NurLogic's standard cell and standard I/O libraries for TSMC 0.18 and 0.25-micron CMOS processes, as well as IBM's 0.25-micron Silicon Germanium (SiGe) BiCMOS process. MOSIS specializes in small run, multi-project wafers, combining multiple customer projects on each wafer. NurLogic's partnership with MOSIS offers companies a cost-effective means for small or prototype runs, as well as reducing time-to-market for new designs.
According to terms of the agreement, MOSIS has created an infrastructure to support customers employing NurLogic IP. NurLogic has physically and electrically optimized each library component to TSMC's and IBM's process technologies, providing customers with silicon-proven IP early in their design cycle.
This partnership offers a tremendous advantage, particularly for fabless semiconductor companies who have difficulty securing time with large fabs because small or prototype runs are given lower priority. Large semiconductor houses may also enjoy a benefit because it enables them to work with small technology innovators to build future relationships.
``MOSIS' partnership with NurLogic will enable companies to work with the latest technologies,'' said Wes Hansford, deputy director of MOSIS. ``NurLogic's distinctive offering allows one IP source which can provide TSMC's CMOS or IBM's SiGe process. This partnership slashes barriers by providing cost-effective IP solutions and wafer accessibility for validating designs and low volume production for companies with limited budgets.''
Prototype runs are costly and often don't receive the same priority as larger production runs unless they have a larger run to follow. This can significantly delay time-to-market, especially for small companies whose future depends upon hitting specific market windows. In addition, fab access is tight, particularly for the most popular process technologies.
``NurLogic's customers rely on our extensive experience with leading-edge foundries, to provide the most comprehensive silicon-proven standard IP offering in the industry,'' said Lisa Lipscomb, NurLogic's vice president of marketing. ``This partnership with MOSIS allows us to help their customers successfully achieve that next important step -- prototype and production runs. The capability this partnership offers will provide great success for small developers.''
Availability
NurLogic's standard cell libraries and I/Os for TSMC's 0.25-micron and 0.18-micron CMOS and IBM's 0.25-micron SiGe BiCMOS processes are available immediately. For pricing information, please contact NurLogic at 877/NURLOGIC. For pricing information on the MOSIS-NurLogic agreement, please contact MOSIS at 310/448-9199.
About MOSIS
MOSIS is a low-cost prototyping and small-volume IC production service. Since 1981, MOSIS has fabricated more than 45,000 circuit designs for commercial firms, government agencies, and research and educational institutions around the world. MOSIS offers regularly scheduled multiproject and dedicated runs supporting cost-effective medium (e.g., 2000 pieces), prototype, and small volume production (COT) quantities with support for a variety of design flows and A 24 x 7 web interface for design rule access, automated design submissions and order tracking.
Headquarters: MOSIS, 4676 Admiralty Way, Suite 700, Marina del Rey, Calif. 90292-6695.
Tel: 310/448-9400. On the web at www.mosis.org.
About NurLogic Design, Inc.
Founded in 1997, NurLogic Design, Inc. provides high-bandwidth connectivity solutions to the networking and communications industries. NurLogic's products encompass customer-specific and industry-standard integrated circuits and semiconductor intellectual property to deliver value-add to its customers. NurLogic products are targeted at CMOS and silicon germanium technologies, and include high-speed connectivity IP, analog and mixed-signal IP, foundation IP, and PMD and PHY ICs. Based in San Diego, California, the company has regional sales offices in Massachusetts and Silicon Valley. NurLogic is a privately held corporation.
Headquarters: 9710 Scranton Road, Suite 380, San Diego, Calif. 92121.
Tel: 877/NURLOGIC. On the web at www.nurlogic.com.
Contact:
NurLogic
Lisa Lipscomb, 858/455-7570 ext. 104
lipscomb@nurlogic.com.
or
Grand Arbor Press (for NurLogic)
Cindi Maciolek, 702/341-5395 (press)
cindi@grandarbor.com.
or
MOSIS
Wes Hansford, 310/448-9199
hansford@mosis.org
Related News
- MagnaChip to Offer Cost Competitive Compact Standard Cell Library for Low Power Applications
- Total solution for standard cell & I/O library, and memory IP characterization by Legend's tools
- NurLogic Further Expands Intellectual Property Offering With Standard Cell and I/O Libraries Utilizing TSMC's Advanced 0.13-Micron Process
- Dolphin Integration announce the availability of new ROM TITAN and ultra low leakage standard cell library SESAME BIV at TSMC 55 nm LP eFlash
- Cactus Semiconductor chooses Dolphin Integration's Library for their low power, portable medical applications
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |