D&R Headline News (Last 14 Days)

Headlines for Wednesday Jan. 22, 2025

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Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon

The first public specificiation for the Arm Chiplet System Architecture is now available, with over 60 companies contributing to its development.

• MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
• MIPI Alliance Announces Board Leadership Appointments
• Alphawave Semi Q4 2024 Trading and Business Update
• ST-GloFo fab plan shelved

Headlines for Tuesday Jan. 21, 2025

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Cadence to Acquire Secure-IC, a Leader in Embedded Security IP

Leading embedded security offerings will complement Cadence’s expanding IP portfolio, unlocking a growing multi-hundred-million incremental TAM opportunity

• Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
• Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
• YorChip announces patent-pending Universal PHY for Open Chiplets
• PQShield announces participation in NEDO program to implement post-quantum cryptography across Japan
• Credo to Exhibit at Chiplet Summit 2025

Headlines for Monday Jan. 20, 2025

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Qualitas Semiconductor Signs IP Licensing Agreement with Edge AI Leader Ambarella

Under this agreement, Ambarella will utilize Qualitas C/D-PHY IP, implemented on the 5nm process, to apply it to its next-generation AI engine, CVflow®-based SoCs (System-on-Chips).

• Electronic System Design Industry Posts $5.1 Billion in Revenue in Q3 2024, ESD Alliance Reports
• BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura's Cyberthreat Intelligence Tool
• High-Performance 16-Bit ADC and DAC IP Cores Ready to licence

Headlines for Friday Jan. 17, 2025

• Alchip Opens 3DIC ASIC Design Services
• GlobalFoundries Announces New York Advanced Packaging and Photonics Center
• QuickLogic to Exhibit at Chiplet Summit 2025

Headlines for Thursday Jan. 16, 2025

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CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core

This new IP core implements the Module-Lattice Key Encapsulation Mechanism (ML-KEM) as specified in the NIST FIPS 203 standard, and is CAST’s first product leveraging the power of the NIST-standardized post-quantum cryptography (PQC) algorithms to secure future SoC designs.

• Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• Fraunhofer IZM is powering the evolution of chiplet technologies as part of the APECS pilot line
• Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
• RIKEN adopts Siemens' emulation and High-Level Synthesis platforms for next-generation AI device research

Headlines for Wednesday Jan. 15, 2025

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InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology

The next-generation UCIe physical layer IP, based on TSMC's N4 process, is expected to finalize its design later this year, supporting data transmission speeds of up to 64 GT/s per channel.

Headlines for Tuesday Jan. 14, 2025

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Creonic Introduces Doppler Channel IP Core

The Creonic Doppler Channel IP core generates Doppler shift frequencies by precisely adjusting the phase of signal samples in real-time.

• Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
• RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
• Altera Launches New Partner Program to Accelerate FPGA Solutions Development
• YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet

Headlines for Monday Jan. 13, 2025

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NASA Awards Alphacore Four Contracts for Radiation Hardened Microelectronics Innovation

The National Aeronautics and Space Administration (NASA) awarded four contracts in 2024 to Alphacore to advance the development of cutting-edge microelectronics systems to support space and other missions.

• SIA Statement on Biden Administration Action Imposing New Export Controls on AI Chips
• BrainChip Brings Neuromorphic Capabilities to M.2 Form Factor
• Exostiv Labs Unveils AMD Versal Adaptive SoC Device Support for Exostiv and Exostiv Blade Platforms
• TSMC December 2024 Revenue Report
• Alphacore's Digital CMOS Impulse Ground-Penetrating Radar (GPR) Transceiver ASIC
• Synopsys Responds to the European Commission Approving its Proposed Acquisition of Ansys in Phase 1

Headlines for Friday Jan. 10, 2025

• Imagination pulls out of RISC-V CPUs

Headlines for Thursday Jan. 09, 2025

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M31's 12nm GPIO IP Adopted by C*Core Technology, Powering Innovation in Advanced Process Automotive Chips

M31 Technology (M31), a global leader in silicon intellectual property (IP), and C*Core Technology (C*Core) have announced the further deepening of collaboration, making a first joint entry into the advanced process technology field.

• TTTech divests strategic stake in landmark transaction to NXP to fuel future growth with technology investments in core business
• Qualitas Semiconductor and Verisilicon signed a licensing agreement for 4nm PCIe 6.0 PHY IP

Headlines for Wednesday Jan. 08, 2025

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Ceva Powers Oritek's Next-Gen ADAS chipsets for Smarter, Safer Electric Vehicles

Lonquan 560 SoCs leverage Ceva-SensPro Vision AI DSP to advance ADAS capabilities amidst China's rapidly growing EV market and global shift towards more sustainable and intelligent transportation solutions

• RISC-V in AI and HPC Part 1: Per Aspera Ad Astra?
• Synopsys Responds to the UK Competition and Markets Authority Provisionally Accepting its Proposed Remedies in Phase 1 Regarding its Proposed Acquisition of Ansys
• Eighteen New Semiconductor Fabs to Start Construction in 2025, SEMI Reports
• VeriSilicon's Display Processing IP DC8200-FS has achieved ISO 26262 ASIL B certification
• BrainChip Unveils Edge AI Box Partner Ecosystem for Gestures, Cybersecurity, Image Recognition, and Computer Vision

Headlines for Tuesday Jan. 07, 2025

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Ceva Embedded AI NPUs Gain Traction in AIoT and MCU Markets, with Multiple Customer Wins and Enhanced AI Software Studio

Ceva today announced that its award-winning Ceva-NeuPro-Nano Embedded AI NPUs have gained significant traction in the AIoT and MCU markets, with multiple customer wins and an enhanced development studio that covers the full software design cycle for AI and embedded applications.

• Ceva Expands Embedded AI NPU Ecosystem with New Partnerships That Accelerate Time-to-Market for Smart Edge Devices
• QuickLogic Announces Strategic Process for SensiML
• Secure-IC's worldwide leading safe & secure automotive solutions achieve a new breakthrough: Securyzr™ S700 neo series reach ASIL-D grade
• UMC Reports Sales for December 2024
• GUC Taped Out UCIe 40Gbps IP using Adaptive Voltage Scaling (AVS)
• Qualitas Semiconductor Secures Multiple Project Licensing Agreements with Pansemi Following Successful Initial Collaboration