Attopsemi Technology Published a Paper for the IEEE S3S Conference in October 16-19 2017, San Francisco
Hsinchu, Taiwan – October 30, 2017 – Attopsemi Technology published a paper “32Kb Innovative Fuse (I-Fuse) Array in 22nm FD-SOI with 0.9V/1.4mA Program Voltage/Current and 0.744um2 Cell” for the 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S). Held in October 16-19, 2017 in San Francisco, IEEE S3S Conference is the only conference dedicated to SOI, 3D IC, and subthreshold technologies.
In the well-received paper in Session10.4, Attopsemi showed how her I-fuse™, a fuse-based OTP (One-Time Programmable) memory, can be very small in size (0.7544um2), low in program voltage (0.9V) and low in program current (<1.4mA) at 22nm FD-SOI process. Based on a 4Kx8 I-fuse™ array, the I-fuse™ can be programmed with current at least 1/20 of an eFuse and with voltage at least 1/5 of anti-fuse in comparable node. Moreover, the OTP IP size is only 1/10 of anti-fuse in comparable nodes since no charge pumps are required as the programming voltage very close to the core voltage of 0.8V. Very low voltage and current programming results in very little damage in I-fuse™ after programming. As a result showed in SEM photos, whether an I-fuse™ has been programmed or not is not easily detectable by top view or by cross section. This paper offered two additional schemes to further increase the data security by lowering the post-program resistance and by programming the virgin I-fuse™ lightly but still read as unprogrammed. Despite the very low voltage/current programming, the cell current distributions of I-fuse™, whether programmed or not, are very tight and can be easily sensed with a proper sense amplifier in most memory designs. The I-fuse™ array also passed HTOL at 150oC for 1,000 hours with virtually no degradation in cell currents. A full blown 4Kx8 I-fuse™ macro at 22nm FD-SOI is also working and will be published in IEEE conference soon.
Please refer to the following links for more information.
http://s3sconference.org/program
About Attopsemi Technology
Founded in 2010, Attopsemi Technology is dedicated to developing and licensing fuse-based One-Time Programmable (OTP) IP to all CMOS process technologies from 0.7um to 7nm and beyond in various silicided polysilicon, HKMG, FDSOI and FinFET technologies. Attopsemi provides the best possible OTP solutions for all merits in small size, low voltage/current programming/read, high quality, high reliability, low power, high speed, wide temperature and high data security. Attopsemi's proprietary I-fuse™ OTP technologies have been proven in numerous CMOS technologies and in several silicon foundries.
|
Attopsemi Technology Hot IP
- 1x64 Bits OTP (One-Time Programmable) IP, GlobalFoundries 22nmFDX 0.8V/1.8V Proc ...
- 32x8 Bits OTP (One-Time Programmable) IP, TSMC 0.18μm Mixed-Signal 1.8V/3.3V Pr ...
- 512x8 Bits OTP (One-Time Programmable) IP, GLOBALFOUNDRIES 0.13um BCD 1.5V/5V Pr ...
- 4Kx8 Bits OTP (One-Time Programmable) IP, TSMC 0.18µm 1.8V/5V Mixed-Signal Proc ...
Related News
- Agnisys to Present Functional Safety, Machine Learning, IoT Solutions, and More at the Design Automation Conference in San Francisco
- Attopsemi Published a Paper in ICMTS 2016, Yokohama, Japan
- Broad Range of MIPS-Based™ Solutions Displayed At 2003 Embedded Systems Conference (ESC) in San Francisco
- Alphacore Recognized for its TID Results of 22-nm FDSOI SRAM Published in IEEE Transactions on Nuclear Science journal
- Andes Technology Announces Return of the Annual RISC-V CON on October 18th in the San Jose Airport DoubleTree Hotel
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |