Aldec's HES UltraScale+ Reconfigurable Accelerator and Northwest Logic's PCI Express Cores Provide Proven PCI Express Solution
Update: Rambus Completes Acquisition of Northwest Logic, Extending Leadership in Interface IP (Aug. 27, 2019 )
Henderson, NV. – April 11th, 2018 – Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has used Aldec’s HES-XCVU9P-QDR UltraScale+ board with Northwest Logic’s Expresso 3.0 core for PCI Express® and AXI DMA Back-End Core to demonstrate a proven PCI Express solution which provides over 6 GB/s PCI Express throughput.
“Several of our customers developing High-Performance Computing (HPC) applications such as those for High Frequency Trading (HFT) and Genome Alignment require easy to use PCIe core with a high throughput”, said Louie De Luna, Director of Marketing. “Northwest Logic’s Expresso 3.0 solution with high-performance scatter-gather DMA support is ideal for the various Endpoint, Root Port, Dual Mode and Switch use cases of our customers.”
“Aldec’s HES-HFT reconfigurable accelerator platform enables designers to effectively validate large complex designs.” said Northwest Logic’s president, Brian Daellenbach. “We are happy to collaborate with Aldec in providing our IP to offer a pre-validated PCI Express solution to their customers.”
Aldec’s HES-XCVU9P-QDR board contains a Xilinx® Virtex™ UltraScale+ XCVU9P FPGA. The re-configurable FPGA combined with QDR-II+ or DDR4 memory modules provide high throughput for algorithm acceleration and data processing using the PCIe interface protocol. The PCIe x16 half-length low-profile board is 1U compatible and easily fits into enterprise rack systems for maximum performance density.
Northwest Logic provides a complete PCI Express Solution. This solution includes Northwest Logic’s high-performance, easy-to-use, silicon-proven Expresso 4.0/3.0/2.1/1.1 Cores for PCI Express, DMA Cores which provide high-performance scatter-gather DMA engines, Drivers (Linux & Windows) and Application software.
Aldec’s HES-XCVU9P-QDR is now ready for shipment. Download Tech specs here.
About Aldec
Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, SoC and ASIC Emulation/Prototyping, Design Rule Checking, CDC/RDC Verification, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification, Embedded Solution, High-Performance Computing and Military/Aerospace solutions. www.aldec.com
About Northwest Logic
Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance PCI Express solution (PCI Express 4.0, 3.0, 2.1 and 1.1 cores and drivers), Memory Interface Solution (HBM2, DDR4/3, LPDDR4), and MIPI Solution (CSI-2, DSI-2, DSI). These solutions support a full range of platforms including ASICs, Structured ASICs and FPGAs. For additional information, visit www.nwlogic.com.
Media Contact
Richard Warrilow
+44 (0)1522 789000
richardw@aldec.com
Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are the property of their respective owners.
|
Related News
- Aldec Verifies Compatibility of Northwest Logic's PCI Express Cores with HES-7 SoC/ASIC Prototyping Platform
- Northwest Logic's Expresso 4.0 Controller Core and Fidus Systems' Zynq UltraScale+ Platform demonstrates PCIe 4.0 Support
- Northwest Logic's PCI Express Gen3 Core and S2C's Virtex-7 ASIC Prototyping Platform fully validated together
- DINI Group Verifies Compatibility of Northwest Logic's PCI Express Cores with Virtex-7 ASIC Prototyping Platforms
- Northwest Logic's PCI Express 3.0 Solution passes PCI-SIG PCIe 3.0 Compliance Testing at First Official PCIe 3.0 Compliance Workshop
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |