Cadence Innovus Implementation System Speeds Development of New Realtek DTV SoC Solution
The Innovus Implementation System provided higher capacity and improved quality of results for 28nm SoC design than previous solution
SAN JOSE, Calif. -- May 2, 2018 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Realtek Semiconductor Corp. used the Cadence® Innovus™ Implementation System for its 28nm Digital TV (DTV) System-on-Chip (SoC) production tapeout and achieved an area improvement and reduced power. In addition to the quality of results (QoR) improvements, the Innovus Implementation System’s higher capacity enabled larger top-level blocks, reducing hierarchy and complexity of the SoC’s top level.
For more information on the Innovus Implementation System, please visit www.cadence.com/go/innovusrt.
The Innovus Implementation System demonstrated its outstanding ability to enable Realtek to deliver larger and more complex DTV SoCs within tight market deadlines and meet aggressive power and area targets. Realtek had several years of experience using a previous-generation floorplanning solution from Cadence, so it was an easy migration that enabled the design team to be more productive when using the Innovus Implementation System for larger blocks.
“As our SoC designs increased in size, the top-level blocks became larger and larger, requiring a high-capacity implementation tool,” said Yee-Wei Huang, vice president and spokesperson for Realtek Semiconductor Corp. “The Cadence Innovus Implementation System enabled us to implement these bigger blocks while improving the QoR, which resulted in faster design closure and a more competitive product.”
The Innovus Implementation System is a massively parallel physical implementation system that enables engineers to deliver high-quality designs with competitive power, performance and area (PPA) targets while accelerating time to market. It is a part of the Cadence digital design platform that supports the company’s overall System Design Enablement strategy, which enables system and semiconductor companies to create complete, differentiated end products more efficiently.
About Cadence
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.
|
Cadence Hot IP
Related News
- Freescale Speeds SoC Implementation Time by 7X with Cadence Innovus Implementation System
- Innovium Adopts the Cadence Innovus Implementation System for Its Highly Scalable Switch Silicon Family for Data Centers
- Toshiba Adopts Cadence Innovus Implementation System for Production Mobile Memory Controller Design
- Cadence Innovus Implementation System Qualified on Samsung 10nm FinFET Process
- HiSilicon Adopts Cadence Innovus Implementation System for Production DSP Designs
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |