Silex Inside eSecure Root-of-Trust Security IP Is Excellent Fit with RISC-V Cores
Louvain-la-Neuve, Belgium – July 6, 2018 – Silex Inside, leading provider of IP cores for cryptography, announces that its comprehensive eSecure IP solution is also available for RISC-V architectures. eSecure is a silicon proven IP module that turns ASIC, FPGA or SoC designs into fully secured applications that guarantee the authenticity and integrity of the hardware, software, data, and communication. The solution is the most efficient on the market and is also highly scalable, making it suited for today’s IoT solutions as well as for more compute-intensive applications. eSecure can be integrated into almost any system architecture, including into cores based on the RISC-V instruction set.
Today, as forever more and diverse applications become connected in a global network, it is key to underpin systems with rock-solid, future-proof security. “We have a stellar reputation as supplier of such solutions in the form of IP modules, mainly for the excellent security, scalability, and ease of use,” says Thierry Watteyne, CEO of Silex Inside. “But we also go to great lengths to make our solution available for the widest variety of architectures. And that is why we now announce the compatibility of eSecure with RISC-V cores.”
eSecure acts as a Root-of-Trust. At its heart is a secure controller that takes full control over all security functions, especially those that shield the system’s secrets such as encryption keys from the main applications running on the product. The module also contains a scalable cryptographic engine supporting symmetric and asymmetric operations, secure debugging capability, authentication of components, firmware and application software, advanced anti-tampering features, protection against side-channel attacks, a secure storage interface, and much more. The cryptographic engine supports all latest algorithms for TLS/DTLS 1.3, Thread Networking, Apple HomeKit, Bluetooth, ZigBee and more. In a typical implementation, eSecure is implemented as a separate core on the SoC, a security coprocessor. This offloads the intensive cryptographic calculations from the main processor and prevents that the main application becomes temporarily unavailable.
“Our solution has been designed for ease of integration,” adds Pieter Willems, Sales Manager Security Products at Silex Inside. “And in addition our experts relish assisting customers and finding hardware security solutions for their innovative systems. So as the base of RISC-V systems is growing, we are excitedly anticipating a wave of new applications secured by eSecure.”
Silex Inside eSecure - more information on https://www.silexinside.com/products/security/esecure/
About RISC-V
RISC-V is an open instruction set architecture (ISA) ready to enable a new era of processor innovation through open standard collaboration. Born in academia and research, the RISC-V ISA delivers a new level of free, extensible software and hardware. Today, RISC-V is set to become a standard open architecture for industry implementations under the governance of the RISC-V Foundation (https://riscv.org/risc-v-foundation/)
About Silex Inside
Silex Inside (Louvain-La-Neuve, Belgium) is a world leader in security and video technology for embedded electronics. We offer solutions ranging from IP for ASIC and FPGA up to manufacturing of OEM hardware boards. Our specialized consultancy services enable us to offer tailored solutions and involved support to our customers. Thanks to our continued stream of innovations, Silex Inside provides state-of-the-art solutions. More information on https://www.silexinside.com/
|
Related News
- Andes Technology and Silex Insight Announce Strategic Partnership for RISC-V Based Root-of-Trust IP Solutions
- Inside Secure Unveils Industry's First Root-of-Trust Solution based on RISC-V Processor
- Silex Insight and Andes Technology extend strategic partnership to deliver flexible and scalable Root-of-Trust security IP solution
- HighTec C/C++ Compiler Suite Supports Andes' ISO 26262 Certified RISC-V IP for Automotive Safety and Security Applications
- SEALSQ Introduces QS7001, a Newly Developed Cutting-Edge RISC-V Secure Hardware Platform, Specifically Designed for IoT security in the Post-Quantum Era
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |