Arteris IP Announces New FlexNoC 4 Interconnect IP with Artificial Intelligence (AI) Package

Industry leading commercial interconnect IP accelerates development of next-generation deep neural network (DNN) and machine learning systems

CAMPBELL, Calif. – October 31, 2018 – Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced the new Arteris IP FlexNoC version 4 interconnect IP and the companion AI Package. FlexNoC 4 and the AI Package (“FlexNoC 4 AI”) implement many new technologies that ease the development of today’s most complex AI, deep neural network (DNN), and autonomous driving systems-on-chip (SoC).

Related

FlexNoC 5 Option For Scalability and Performance Critical Systems

Arteris IP created the new technologies in FlexNoC 4 AI based on its learning from some of the world’s leading AI and DNN SoC design teams. Arteris IP customers developing AI chips include autonomous driving pioneer Mobileye, who recently licensed Arteris IP FlexNoC and Ncore interconnect IP for its next-generation EyeQ systems, Movidius, Cambricon, Intellifusion, Enflame, Iluvatar CoreX, Canaan Creative, and four other companies that have not been publicly announced.

New capabilities in FlexNoC 4 and the new AI Package include:

• Automated topology generation for mesh, ring and torus networks –FlexNoC 4 AI enables SoC architects to not only generate AI topologies automatically but also edit generated topologies to optimize each individual network router, if desired.
• Multicast – FlexNoC 4 AI intelligent multicast optimizes the usage of on-chip and off-chip bandwidth by broadcasting data as close to network targets as possible. This allows for more efficient updates of DNN weights, image maps and other multicast data.
• Source synchronous communications – Helps avoid clock tree synthesis, physical placement, and timing closure problems when spanning long distances on AI chips, which can be larger than 400 mm².
• VC-Link™ virtual channels – Allows sharing of long physical links in congested areas of the die while maintaining quality-of-service (QoS).
• HBM2 and multichannel memory support – Ideal integration with HBM2 multichannel memory controllers with 8 or 16 channel interleaving.
• Up to 2048-bit wide data support – With non-power of 2 data width and integrated rate adaptation

“Numerous startups are attempting to develop SoCs for neural-network training and inference, but to be successful, they must have the interconnect IP and tools required to integrate such complex, massively parallel processors while meeting the requirements for high-bandwidth on-chip and off-chip communications,” said Mike Demler, Senior Analyst and Senior Editor, The Linley Group and Microprocessor Report. “Arteris IP has the experience and interconnect IP to help these companies succeed, and FlexNoC 4 with the AI Package provides the features required for AI chips in an easy-to-use and highly configurable form.”

“FlexNoC 4 and the accompanying AI Package are major interconnect technology updates that streamline creation of the next generation of AI SoCs that hardware-accelerate neural network processing,” said K. Charles Janac, President and CEO of Arteris IP. “Arteris IP is committed to maintain and extend its role as the world’s leading technology provider for on-chip communications IP products that simplify the development and assembly of the highly complex chips designed by our customers.”

Availability

FlexNoC 4 interconnect IP and the FlexNoC 4 AI Package are available immediately.

About Arteris IP

Arteris IP provides network-on-chip (NoC) interconnect IP to accelerate system-on-chip (SoC) semiconductor assembly for a wide range of applications from AI to automobiles, mobile phones, IoT, cameras, SSD controllers, and servers for customers such as Samsung, Huawei / HiSilicon, Mobileye, and Texas Instruments. Arteris IP products include the Ncore cache coherent and FlexNoC non-coherent interconnect IP, the CodaCache standalone last level cache, and optional Resilience Package (ISO 26262 functional safety) and PIANO automated timing closure capabilities. Customer results obtained by using the Arteris IP product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. For more information, visit www.arteris.com

Contact Arteris Fill out this form for contacting a Arteris representative. Your Name: Your E-mail address: Your Company address: Your Phone Number: Write your message: