Arm's Data Center Two Step
Smart offload chips point the way to servers
By Rick Merritt, EETimes
November 5, 2018
Arm put smart offload processors in the spotlight at its annual developers’ conference because they are stepping stones to its data center ambitions. The cloud is the latest target for the still-small designer of cores that investor Softbank is betting will be a semiconductor giant someday.
The name is a relatively new handle, but the chips have been around for years. They first emerged as TCP offload engines more than 15 years ago. Now, they sometimes ride network interface cards called smart NICs.
Along with the new smart names, the chips have taken on more jobs. Today, they handle a flexible basket of security, storage, and virtualization tasks.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Arm Ltd Hot IP
Related News
- Synopsys Launches Industry's First Complete 1.6T Ethernet IP Solution to Meet High Bandwidth Needs of AI and Hyperscale Data Center Chips
- Cadence Collaborates with Arm to Accelerate Neoverse V2 Data Center Design Success with Cadence AI-driven Flows
- NVIDIA Collaborates With SoftBank Corp. to Power SoftBank's Next-Gen Data Centers Using Grace Hopper Superchip for Generative AI and 5G/6G
- Ventana Introduces Veyron, World's First Data Center Class RISC-V CPU Product Family
- Cadence Palladium Z2 Enterprise Emulation Platform Accelerates Microchip's Data Center Solutions SoC Development
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset