Toshiba Unveils 130nm FFSA Development Platform Featuring High Performance, Low Power and Low Cost Structured Array
Long-term supply using a subsidiary’s fab
TOKYO– November 13, 2018 -- Toshiba Electronic Devices & Storage Corporation (“Toshiba”) today announced a new 130nm manufacturing process node based FFSA™ (Fit Fast Structured Array), an innovative custom SoC development platform featuring high performance, low cost and low power consumption[1].
Toshiba provides ASIC (Application Specific IC) and FFSA™ platforms that suit the customer's business environment and requirements, that also deliver efficient solutions for custom SoC development. FFSA™ devices use a silicon-based master slice which is common in combination with upper metal layers that are reserved for customization. By customizing only a few masks, FFSA™ offers much lower NRE costs than individual ASIC development. It also enables significant reductions in development cost and provides samples and mass-production in a short period of time than for conventional ASIC’s. Additionally, FFSA™ enables higher performance and lower power consumption than FPGA (Field Programmable Gate Array) using ASIC design methodology and its library. [1]
The 130nm process series joins Toshiba’s current 28nm, 40nm, and 65nm process portfolio making FFSA™ a suitable option for the growing industrial equipment market.
The 130nm FFSA™ devices designed on the platform will be manufactured by Japan Semiconductor, a subsidiary of Toshiba Electronic Devices & Storage Corporation with a long and proven history of expertise in manufacturing ASIC, ASSP and microcomputers. This will ensure long-term supply and meet the needs of customer business continuity plans.
The new series deliver the performance and integration needed for industrial apparatus, communication facilities, OA equipment and consumer products where steady market expansion is expected.
FFSA™ lineup
Process technology | 130nm | 65nm | 40nm | 28nm |
---|---|---|---|---|
The maximum gate number[2] | 912Kgate | 21Mgate | 25Mgate | 100Mgate |
Maximum SRAM capacity | 664Kbit | 19Mbit | 30Mbit | 207Mbit |
Maximum transceiver speed | - | - | 12.5Gbps | 28Gbps |
Number of maximum transceiver lanes | - | - | 14 | 64 |
Number of maximum I/O pins | 337 | 1110 | 720 | 928 |
Notes:
[1] Toshiba in-house comparisons of conventional FPGA products.
[2] The number of available gates is a guideline and will vary by application.
About Toshiba Electronic Devices & Storage Corporation
Toshiba Electronic Devices & Storage Corporation combines the vigor of a new company with the wisdom of experience. Since becoming an independent company in July 2017, we have taken our place among the leading general devices companies, and offer our customers and business partners outstanding solutions in discrete semiconductors, system LSIs and HDD.
Our 22,000 employees around the world share a determination to maximize the value of our products, and emphasize close collaboration with customers to promote co-creation of value and new markets. We look forward to building on annual sales now surpassing 800-billion yen (US$7 billion) and to contributing to a better future for people everywhere.
Find out more about us at https://toshiba.semicon-storage.com/ap-en/top.html
|
Related News
- Xilinx Announces New Low Cost, High Performance DSP Development Platform
- OPENEDGES unveils high performance & low power GDDR6 controller IP
- New LatticeECP4 Family Redefines Low Cost, Low Power FPGAs, Features High Performance Innovations
- Cypress Revolutionizes Embedded Design with High Performance, Low Power PSoC® PSoC 5 Programmable System-on-Chip Architectures
- Improv Systems Offers Pre-Configured Application Processor Cores Based On Its Popular High Performance, Low Power Jazz Platform
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |