Process Detector (For DVFS and monitoring process variation)
NSITEXE Develops Test Chip with Next-generation Semiconductor IP Core Called a DFP
December 13th, 2018 -- NSITEXE Inc. will join the 11th AUTOMOTIVE WORLD to be held at Tokyo Big Sight from Wednesday, January 16 to Friday, January 18, 2019. At the event, NSITEXE will unveil a test chip with a next-generation IP core (Data Flow Processor: DFP) that it is developing, as well as a test circuit board to be presented to potential customers and development partners.
Since being established in September 2017, NSITEXE has been building partnerships with companies including ThinCI Inc., a North American startup with key technology for high-performance semiconductors, to accelerate the development of the DFP.
With an improved R&D system and in closer collaboration with partners including Dai Nippon Printing Co., Ltd.,*1 NSITEXE has developed a system on a chip (SoC) to demonstrate the performance of the DFP and a test circuit board on which to mount this SoC, and started trial production. Moreover, NSITEXE plans to start demonstration tests on the DFP, using the test chip and circuit board in the spring of 2019.
In addition to a DFP, the new SoC has two CPUs: Arm®*2 Cortex®-R52 and Wave Computing MIPS*3 I6500 and multiple interfaces, including LPDDR4 and PCIe. The performance of the DFP when used in a vehicle and when used with different embedded system applications will be demonstrated. A software development kit, drivers, a library, and other tools will be prepared and offered to development partners. Demonstration tests are intended to improve the performance of next-generation DFPs and show to customers in different business fields how the DFP accelerates applications.
NSITEXE will continue to offer better semiconductor technology that brings more benefits to society.
|
Related News
- NSITEXE DR1000C, a RISC-V based parallel processor IP with vector extension (DFP: Data Flow Processor) has been licensed for Renesas' new RH850/U2B Automotive MCUs
- NSITEXE Adopts Synopsys HAPS Prototyping to Validate Data Flow Processor IP
- NSITEXE Achieves First-Pass Silicon Success for High-Performance Data Flow Processor-based SoC Test Chip Using DesignWare IP
- Synopsys Enables First-Pass Silicon Success of High Performance NSITEXE Data Flow Processor-based SoC Test Chip for Autonomous Driving
- NSITEXE Accelerates Delivery of Data Flow Processor IP for Automotive and Industrial Applications Using the Cadence Digital Design Full Flow
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |