Xilinx Announces Virtex-II Pro FPGA Die Size Advantage
Technology leadership delivers significantly smaller die than competing FPGAs
SAN JOSE, Calif., December 18, 2002-Xilinx Inc. (NASDAQ: XLNX) reinforced its position today as the industry's technology leader, with the announcement that detailed analysis reveals that the Virtex-II Pro Platform FPGA family demonstrates a 35 percent smaller die size as compared to competitive products*. This die size advantage translates into more logic gates and memory for system designers with no additional cost. In addition, designers benefit from the only FPGA in the industry to offer embedded PowerPC processor cores and RocketIO serial transceivers immersed into the die.
"As inventors of the FPGA, we have more years of programmable logic design experience than anyone else in the industry. This experience continues to result in more features and more logic in a smaller die size than any competing FPGA," said Rich Sevcik, senior vice president and general manager of FPGA Products at Xilinx.
Built-in Advantages to Platform FPGAs
Xilinx achieved this advantage by designing the Virtex-II Pro FPGAs on the proven Virtex-II FPGA architecture. The innovative IP-Immersion fabric allows Xilinx to more efficiently integrate hard IP into the FPGA, delivering more features, more block RAM, and more logic cells at a lower cost than any alternative solution. In addition, with the abundant, fourth-generation routing resources, designers get a high-performance solution independent of the IP used in the device.
"Xilinx is now offering FPGAs that deliver the best cost per gate with more performance plus PowerPC processors and RocketIO transceivers for no additional charge" said Sandeep Vij, vice president of Worldwide Marketing at Xilinx. "This reinforces our leadership and is consistent with our 17 year history of delivering more FPGA features and performance at the lowest cost in the industry."
Commitment to 300mm Production
Because of the overwhelming success of the Virtex-II Pro FPGA family, and the need to drive down costs to meet the needs of customers, Xilinx has accelerated its move to 300mm wafer production with fab partner UMC for the 130 nm process Virtex-II Pro FPGAs. The larger 300mm wafers allow more chips per silicon wafer. The company predicts that 50 percent of its production will be on 300 mm within the next quarter and is the highest volume purchaser of 300mm wafers in the world.
"Xilinx has proven to be the ideal partner in the aggressive development of our 300mm capabilities," said Chris Chi, senior vice president of UMC. "The cost optimization benefits of 300mm wafers will ultimately benefit FPGA customers as Xilinx continues to drive down costs of programmable logic."
About Xilinx
Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader of programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com.
*Adjusted for equivalent logic cells
|
Xilinx, Inc. Hot IP
Related News
- Xilinx Virtex-II Pro World's Most Popular 130nm FPGA
- Corelis Announces JTAG Emulation Support for the Xilinx Virtex-II Pro FPGA PowerPC 405 Core
- Xilinx Announces Virtex-II Pro FPGA Development Board
- Xilinx Spartan-3 And Virtex-II Pro FPGAs Win Multiple Designs In Mangrove MPLS Platforms
- Xilinx Virtex-II Pro FPGAs Enable Pandora's Newest 3-D Colour Cube
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |