ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine
Creonic Shows 100 Gbps Polar Decoder in International SENDATE-TANDEM Research Project
Kaiserslautern, Germany, April 10, 2019 – Creonic is pleased to announce its successful participation in the SENDATE-TANDEM (Tailored Network for Data Centers in the Metro) research project, which is a sub-project of the CELTIC SENDATE project. The project ended on March 31, 2019.
Creonic contributed to the development and demonstration of an advanced forward error correction (FEC) for future ultra high-speed fiber-based transport network architectures. The demonstrator consists of Xilinx Virtex Ultrascale+ FPGA, running a simulation chain with channel emulation and optical loop back for real-time measurements of frame and bit error rate performance of polar codes. It features a list polar decoder with a throughput of 100 Gbps and less than 1 µs of latency.
The project volume of SENDATE is €72.8 millions. The SENDATE-TANDEM consortium consists of 27 partners located in France and Germany. Main industry partners are Nokia Bell Labs France/Germany (former Alcatel-Lucent), Orange, Gemalto, and Thales. The German partners receive funding from the Federal Ministry of Education and Research (BMBF) in Germany.
For more information please visit the SENDATE or SENDATE-TANDEM project pages.
About Creonic
Creonic is an ISO 9001:2015 certified provider of ready-for-use IP cores for several algorithms of communications such as forward error correction (LDPC, Turbo, Polar), modulation, and synchronization. The company offers the richest product portfolio in this field, covering standards like 5G, 4G, DVB-S2X, DVB-RCS2, DOCSIS 3.1, WiFi, WiGig, and UWB. The products are applicable for ASIC and FPGA technology and comply with the highest requirements with respect to quality and performance. For more information please visit our website at www.creonic.com.
|
Creonic Hot IP
Related News
- Creonic Participates in International SENDATE-TANDEM Research Project
- IPrium releases 100 Gbps Polar Encoder and Decoder
- Creonic Participates in 6G Research Project Led by Deutsche Telekom
- Creonic Participates in Horizon 2020 EPIC Research Project
- Creonic Participates in H2020 "VERTIGO" Research Project
Breaking News
- Alphawave Semi Q4 2024 Trading and Business Update
- ST-GloFo fab plan shelved
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
Most Popular
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- Altera Launches New Partner Program to Accelerate FPGA Solutions Development
- Electronic System Design Industry Posts $5.1 Billion in Revenue in Q3 2024, ESD Alliance Reports
- Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
- YorChip announces patent-pending Universal PHY for Open Chiplets
E-mail This Article | Printer-Friendly Page |