Moortec To Showcase Its PVT Monitoring IP At TSMC 2019 Boston Technology Workshop
April 30, 2019 - Moortec will be showcasing its range of PVT Monitoring Subsystem Solutions supporting advanced node processes at TSMC 2019 Technology Workshop, which is taking place tomorrow at the Boston Marriott Burlington.
Moortec provide market leading high accuracy, highly featured PVT Subsystem IP for Process, Voltage & Temperature (PVT) monitoring, targeting advanced node CMOS technologies on 40nm, 28nm, 16nm, 12nm and 7nm. The Moortec Subsystem provides ASIC designers solutions for thermal management, detection of supply anomalies and the identification of process corners.
At TSMC 2019 Technology Workshop, Moortec will be exhibiting its range of silicon proven, ‘off the shelf’ monitoring IP solutions which are used for monitoring and controlling conditions on-chip to optimise performance, save power, increase reliability and cut costs.
Moortec monitoring IP is used by a wide range of customers worldwide. The use of third-party silicon proven IP on advanced Nodes is growing and as an IP Vendor Moortec are proud to have built long term customer relationships based on excellent products in terms of quality and reliability but also outstanding service, support and results.
Of particular relevance at the event will be the continued focus on applications such as AI, Data Center, Automotive, SSD Controllers and IoT. As a company Moortec are committed to expanding its advanced node in-chip monitoring portfolio while maintaining our focus as the leading PVT provider.
Moortec will also be exhibiting at the TSMC Technology Workshop taking place in Austin at the Fairmont Hotel on Wednesday 8th May.
To arrange a meeting at any of these events please email ramsay.allen@moortec.com or visit www.moortec.com
About Moortec
Moortec provides compelling embedded subsystem IP solutions for Process, Voltage & Temperature (PVT) monitoring, targeting advanced node CMOS technologies on 40nm, 28nm, 16nm, 12nm and 7nm. Moortec’s in-chip sensing solutions support the semiconductor design community’s demands for increased device reliability and enhanced performance optimization, enabling schemes such as DVFS, AVS and power management control systems. Moortec provides excellent support for IP application, integration and device test during production. Moortec’s high-performance analog and mixed-signal IP designs are delivered to ASIC and System on Chip (SoC) technologies within the Automotive, AI, IoT, Datacenter, DTV, HPC and Networking sectors.
For more information please visit www.moortec.com
|
Related News
- Moortec to Showcase its Advances in Embedded PVT Monitoring IP for 40nm-5nm at 2019 TSMC Open Innovation Platform Ecosystem Forum in Santa Clara
- Moortec to Showcase its PVT Monitoring IP at TSMC 2019 Technology Symposium
- Moortec To Showcase Its Latest Embedded PVT Monitoring IP For 40nm-5nm At The 2019 ICCAD in Nanjing
- Moortec to Showcase its Latest Embedded PVT Monitoring IP for 40nm-5nm at the 2019 ARM TechCon in San Jose
- Moortec to Showcase its PVT Monitoring IP at TSMC China Technology Symposium
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |