Efinix and M31 Technology Corporation Partner to Address Demand for Emerging AI Edge Computing Requirements
SANTA CLARA, Calif. and HSINCHU, Taiwan – May 29, 2019 − Efinix®, an innovator in programmable product platforms and technologies, and M31 Technology Corporation (Taiwan stock code: 6643), a global silicon Intellectual Property (IP) boutique, today announced a technology partnership to address demand for emerging AI edge computing requirements.
As part of the partnership, M31’s MIPI D-PHY RX and TX IP has been integrated successfully into Efinix’s Trion® FPGA platform. The integration provides multiple sets of unidirectional links – up to six Gbps per link – delivering a high-bandwidth interface for an array of next-generation, AI-driven FPGA markets such as HMI and displays, time lapse cameras, automotive, surveillance cameras, machine vision, medical, and infrared cameras.
“The result of partnering two emerging technology leaders, Efinix and M31, is the first FPGA family featuring a MIPI D-PHY with a built-in, royalty-free CSI-2 controller, which is the most popular camera interface used in the mobile industry,” said Ming Ng, Efinix’s SVP of operations and application. “Thanks to our technology integration, our customers have more useable logic elements for video, camera, and sensor innovations.”
“Like the MIPI D-PHY RX and TX, all of M31’s IP (such as USB1.1 to USB3.2, PCIe G2 to G3, as well as MIPI M-PHY) are interface IP cores that are silicon-proven at various foundries and process nodes,” said Allen Sha, president of M31 USA. “We are very happy to have Efinix adopting M31 IP in their FPGA solutions for mobile camera applications.”
AI applications at the edge demand high performance, low, power, and an easy out-of-the-box experience. Trion FPGAs with MIPI offer flexibility, low power, small form factor, and low cost without compromising performance. With multiple MIPI TX and RX channels, Trion FPGAs can become the hub of a system with multiple cameras and sensors. With the built-in, hard CSI-2 controller, AI designers can use all of the FPGA resources for designing.
Today’s announced integrated product is already being used in a customer application featuring a vision sensor camera with capabilities such as 3D, depth detection, HDR, 180 degree, and surround view.
Design Automation Conference
Next week, Efinix will showcase its disruptive FPGA platforms at the Design Automation Conference (DAC) held in Las Vegas June 2nd-6th. To learn more about Efinix’s participation at DAC, visit: https://www.efinixinc.com/dac2019.
About Efinix
Efinix, an innovator in programmable products, drives the future of edge AI computing with its Trion® FPGA platform. At the Trion FPGA’s core is Efinix’s disruptive Quantum™ FPGA technology which delivers a 4X Power-Performance-Area advantage over traditional FPGA technologies. Trion FPGAs, offering 4K to 200K logic elements, have a small form-factor, low-power, and are priced for high-volume production. Our Efinity® Integrated Development Environment provides a complete FPGA design suite from RTL to bitstream. With their Power-Performance-Area advantage, Trion FPGAs address applications such as custom logic, compute acceleration, machine learning and deep learning. Through Efinity, our customers can seamlessly migrate FPGA or full system into Quantum ASIC for ultra-high-volume production. For more information, visit http://www.efinixinc.com.
About M31 Technology Corporation
M31 Technology Corporation is a professional silicon intellectual property (IP) provider. The company was founded in October, 2011 with its headquarters in Hsinchu, Taiwan. M31’s strength is in R&D and customer service. With substantial experiences in IP development, IC design and electronic design automation fields, M31 focuses on providing high-speed interface IP, memory compilers, standard cell library and ESD/IO library solutions. For more information please visit www.m31tech.com
|
M31 Technology Corp. Hot IP
- USB 3.2 Gen2/Gen1 PHY IP in TSMC(5nm, 6nm, 7nm,12nm/16nm, 22nm, 28nm, 40nm, 55nm ...
- PCIe 4.0 PHY in TSMC(6nm,7nm,12nm,16nm)
- MIPI M-PHY v4.1/v3.1 IP in TSMC(5nm, 6nm, 7nm, 12nm,16nm, 22nm, 28nm, 40nm, and ...
- MIPI D-PHY RX/TX v1.1 / v1.2 IP in TSMC (12/16nm, 28nm, 40nm, and 55nm process)
- SerDes PHY IP(12nm, 14nm, 22nm, 28nm)
Related News
- Efinix Completes Trion FPGA Family for Edge Computing, AI/ML and Vision Processing Applications Using Cadence Digital Full Flow Solution
- Efinix Drives AI Edge Computing with Trion T20 FPGA Samples and Expansion of Product Offering to 200K LEs with T200 FPGA
- Arteris and MIPS Partner on High-Performance RISC-V SoCs for Automotive, Datacenter and Edge AI
- Xiphera's Customisable nQrux™ Confidential Computing Engine Protects Cloud, Edge, and AI Environments
- BrainChip and MYWAI Partner to Deliver Next-Generation Edge AI Solutions
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |