7 µW always on Audio feature extraction with filter banks on TSMC 22nm uLL
Chiplet Ecosystem Slowly Picks up Steam
By Dylan McGrath, EETimes
June 18, 2019
SANTA CLARA, Calif. — Momentum continues to coalesce slowly around the creation of an open chiplet ecosystem, enabling the heterogeneous integration of chiplets from multiple vendors in a system-in-package.
Chiplets represent one of several efforts to compensate for slowing performance gains through brute force scaling; it's the slowing of Moore's Law. While individual chip companies including Intel, Marvell, and startup zGlue — as well as system companies such as Cisco — have had some success in creating their own chiplet ecosystems, efforts to date have relied on proprietary multi-chip interfaces.
The development of an industry-wide open chiplet ecosystem that would allow designers to assemble "best of breed" chips incorporating components from multiple vendors requires not only standard open interfaces but also technology advancements in areas such as wafer testing and thermal management and the creation of new business models.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related News
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Chiplet interconnect pioneer Eliyan gains additional financial backing from AI chip ecosystem with strategic investment from VentureTech Alliance
- Cadence Collaborates with Arm to Jumpstart the Automotive Chiplet Ecosystem
- Leaders in Semiconductors, Packaging, IP Suppliers, Foundries, and Cloud Service Providers Join Forces to Standardize Chiplet Ecosystem
- DDR5 Ecosystem Ramps Up
Breaking News
- Siemens delivers certified and automated design flows for TSMC 3DFabric technologies
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results