NSITEXE Accelerates Delivery of Data Flow Processor IP for Automotive and Industrial Applications Using the Cadence Digital Design Full Flow
Integrated Cadence digital design environment featuring the Genus Synthesis Solution lets NSITEXE reduce turnaround time by 75% and optimize overall PPA
SAN JOSE, Calif., 11 Jul 2019 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that NSITEXE, Inc. deployed the Cadence® digital design full flow to accelerate the delivery of its high-efficiency, high-quality data flow processor (DFP) IP for automotive and industrial applications. Using the integrated Cadence digital full flow, starting with the Genus™ Synthesis Solution, NSITEXE successfully reduced turnaround time by 75% while also improving power by 8.5%, performance by 35% and reducing area by 3.5% when compared with its previous competitive solution. For more information on the Cadence digital full flow, please visit http://www.cadence.com/go/fedffnpr.
The Cadence flow deployed at NSITEXE included the Genus Synthesis Solution, Joules™ RTL Power Solution, Conformal® Equivalence Checker, Modus™ DFT Software Solution and Innovus™ Implementation System. The tightly integrated flow provided NSITEXE with a common Cadence database and user interface (UI), eliminating the need for data transfer between tools and communication exchanges between multiple engineers.
The Genus Synthesis Solution played a critical role in the flow, enabling NSITEXE to accelerate iterations from register-transfer level (RTL) to layout. Additionally, the shared engines between the Genus Synthesis Solution and the Innovus Implementation System helped NSITEXE avoid unnecessary iterations and identify design bottlenecks.
“To accelerate the delivery of our high-efficiency, high-quality DFP IP, we needed a solution that enabled us to achieve our aggressive turnaround time goals,” said Hideki Sugimoto, CTO of NSITEXE. “After an extensive evaluation, we decided to implement the Cadence full flow because it offered a tightly integrated design environment that created efficiencies for our team and produced optimal PPA results. We plan to use the Cadence flow to advance our next-generation IP for the rapidly evolving automotive and industrial markets.”
The Cadence digital design full flow is part of the broader digital and signoff suite, which provides customers with an integrated full flow, delivering better predictability and a faster path to design closure. It supports Cadence’s Intelligent System Design™ strategy, accelerating SoC design excellence.
NSITEXE will share more details about their experience with the Cadence digital design full flow at CDNLive Japan 2019, which will take place on July 19, 2019 in Yokohama, Japan. For more information on CDNLive Japan and to register, please visit www.cadence.com/go/cdnlivejapanpr.
About Cadence
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s Intelligent System Design™ strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.
|
Cadence Hot IP
Related News
- Cadence Accelerates Industrial, Automotive, Hyperscale Data Center, and Mobile SoC Verification with Expanded VIP and System VIP Portfolio
- GUC Optimizes Quality of Results and Accelerates Time to Tapeout Using the Cadence Digital Full Flow
- NSITEXE DR1000C, a RISC-V based parallel processor IP with vector extension (DFP: Data Flow Processor) has been licensed for Renesas' new RH850/U2B Automotive MCUs
- Cadence and Imperas Support NSITEXE in the Development of Advanced RISC V Vector Processor IP for Automotive AI Applications
- Cadence Accelerates RF Design with Delivery of New TSMC N16 mmWave Reference Flow
Breaking News
- HPC customer engages Sondrel for high end chip design
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- TSMC drives A16, 3D process technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
E-mail This Article | Printer-Friendly Page |