Bluetooth low energy v5.4 Baseband Controller, Protocol Software Stack and Profiles IP
SmartDV Adds DisplayPort 2.0 to its Portfolio of Verification IP
New VIP for Popular Video Interface Standard Delivered Quickly Via Proprietary SmartDV Compiler, Talented Engineering Group
SAN JOSE, CALIF. –– July 16, 2019 –– SmartDV™ Technologies, the Proven and Trusted choice for Verification Intellectual Property (VIP), today announced it expanded its portfolio with availability of DisplayPort 2.0 VIP, a digital display interface used to connect a video source to a display or monitor.
“DisplayPort 2.0 will offer noticeable improvement for augmented/virtual reality displays, and the reason our user community requested DisplayPort 2.0 support from us,” remarks Deepak Kumar Tala, chairman of SmartDV. “We are able to comply using our proprietary SmartDV Compiler and the efforts of our talented engineering group and proprietary compiler technology to rapidly produce new Verification IP for market delivery.”
SmartDV’s DisplayPort VIP includes a configurable bus functional model (BFM), protocol monitor and library of integrated protocol checks, and supports all major verification languages and methodologies, including open verification methodology (OVM), universal verification methodology (UVM) and SystemC.
“SmartDV”s DisplayPort 2.0 VIP is a welcome addition to its extensive production-proven portfolio,” says Jay Slivkoff, architect and system manager at MegaChips Technology America Corporation. “We view SmartDV as a valued and trusted partner of some of the most important VIP solutions we use in our chip design verification projects, including earlier versions of the DisplayPort standard."
About DisplayPort 2.0
The DisplayPort 2.0 standard, a video interface standard administered by the Video Electronics Standards Association (VESA), allows for a max payload of 77.37 Gigabits per second (Gbps), a 3X increase in data bandwidth performance from earlier versions. New capabilities address future performance requirements of traditional displays beyond 8K resolutions, higher refresh rates and high dynamic range (HDR) support at higher resolutions. It improves support for multiple display configurations, as well as user experience with augmented/virtual reality (AR/VR) displays. Increased bandwidth adds versatility and configuration options for higher display resolutions and refresh rates.
DisplayPort 2.0 is backward compatible and incorporates key features of DisplayPort 1.4a, such as visually lossless Display Stream Compression and HDR metadata transport. It uses the Thunderbolt 3 PHY layer and includes a display stream data mapping protocol common to both single-stream transport and multi-stream transport.
Pricing and Availability
The SmartDV DisplayPort 2.0 Verification IP is shipping now.
Pricing is available upon request.
About SmartDV
SmartDV™ Technologies is the Proven and Trusted choice for Verification and Design IP with the best customer service from more than 250 experienced ASIC and SoC design and verification engineers. Its high-quality standard or custom protocol Verification and Design IP is compatible with all verification languages, platforms and methodologies supporting all simulation, emulation and formal verification tools used in a coverage-driven chip design verification flow. The result is Proven and Trusted Verification and Design IP used in hundreds of networking, storage, automotive, bus, MIPI and display chip projects throughout the global electronics industry. SmartDV is headquartered in Bangalore, India, with U.S. headquarters in San Jose, Calif. Visit www.Smart-DV.com to learn more.
|
Search Verification IP
SmartDV Technologies Hot IP
SmartDV Technologies Hot Verification IP
Related News
- Cadence Announces First-to-Market DisplayPort 2.0 Verification IP
- Blue Pearl Adds Design Verification and Methodology Services to its Product Portfolio
- Truechip Adds USB 4 Hub Model & USB 4 Retimer Model to its Verification IP Portfolio
- SmartDV Provides Broad Portfolio of Memory Modeling, Design and Verification Solutions
- SmartDV Unveils Automation Tool Suite for Use with Its Extensive Verification IP Portfolio
Breaking News
- HPC customer engages Sondrel for high end chip design
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- TSMC drives A16, 3D process technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
E-mail This Article | Printer-Friendly Page |