Adaptive Clock Generation Module for DVFS and Droop Response
Sankalp Semiconductor to present technical paper at CDNLive Bangalore
Bangalore, India – August 23, 2019 - Sankalp Semiconductor a design service company offering comprehensive digital & mixed signal SoC solutions, will be presenting paper at CDNLive India 2019 during 28th & 29th August. The selected paper talks in depth on the “Statistical EM Budgeting for improved reliability in FinFet designs using Voltus”. The paper will cover the following key points
- Self-Heating & Aging
- Voltus & Voltus-Fi SEB flow
- Time Dependent Dielectric Breakdown (TDDB)
When: From 3:00 PM to 3:30 PM on 28th August 2019 Where: Radisson Blu Hotel, Bengaluru, India Contact: marcom@sankalpsemi.com
About CDNLive
CDNLive India brings together Cadence® technology users, developers, and industry experts for networking, sharing best practices on critical design and verification issues, and discovering new techniques for designing advanced silicon, SoCs, and systems that transform the way people live, work, and play.
https://www.cadence.com/content/cadence-www/global/en_US/home/cdnlive/india-2019.html
About Sankalp Semiconductor
Sankalp Semiconductor offers an integrated portfolio of services and solutions to its customers in key semiconductor domains including analog & mixed signal, digital, high-speed physical interface IP, Embedded Memory Compiler, IOs and EDA modelling. Sankalp Semiconductor is a preferred semiconductor design service partners to multiple Fortune 500 companies in the Automotive, Consumer, Networking, Wireless, IoT, Medical electronics and Foundry space. The company enables its customers to achieve their time-to-market window by delivering first time right silicon designs and engage with product engineering teams across the globe to design System-On-Chip. Sankalp Semiconductor is based in Palo Alto, California & Hubli, India with offices in USA, India, Canada, Germany, Malaysia and Japan. www.sankalpsemi.com
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