JEDEC Announces Publication of Serial Presence Detect Support and Module Labels Specifications to Support New Hybrid Memory (NVDIMM)
ARLINGTON, Va., USA – SEPTEMBER 10, 2019 – JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of document release 5 of the DDR4 Serial Presence Detect (SPD) Specification. With this release of the document, the revision level of all memory types increases to UDIMM (revision 1.2), RDIMM (revision 1.3), LRDIMM (revision 1.4) and NVDIMM (revision 1.2). In addition, JEDEC issues document release 1 of the DDR4 DIMM Labels Specification.
Among the changes in the released SPD and label documents are support for the DDR4 NVDIMM-H, a proposed memory module based on a combination of DRAM and NAND Flash that provides NAND Flash accessed as a block oriented device. Often targeted at data center computer systems, NVDIMM hybrid modules are the foundational hardware supporting the growing trend for persistent memory, which enhances data resilience and system performance.
“These new specifications enable end users to identify the capabilities of this new class of hybrid module, such as capacity, speed, and access time. The DIMM label allows this information to be read by eye or by 2D barcode scanners, and the SPD enhancements allow the system CPU to read the configuration data electronically at system configuration time,” said John Kelly, JEDEC President.
About JEDEC
JEDEC is the global leader in the development of standards for the microelectronics industry. Thousands of volunteers representing nearly 300 member companies work together over 100 JEDEC technical committees and task groups to meet the needs of every segment of the industry, manufacturers and consumers alike. The publications and standards generated by JEDEC committees are accepted throughout the world. All JEDEC standards are available for download from the JEDEC website. For more information, visit www.jedec.org.
|
Related News
- JEDEC Announces Publication of the SPD5118 Hub and Serial Presence Detect Device and the DDR5 SPD Contents Specifications
- JEDEC Releases New Standard for LPDDR5/5X Serial Presence Detect (SPD) Contents
- JEDEC Announces Support for NVDIMM Hybrid Memory Modules
- JEDEC Announces Publication of Release 6 of the DDR3 Serial Presence Detect Standard
- JEDEC Publishes New Standard to Support CXL Memory Module Implementation
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |