Mixel's MIPI D-PHY IP Integrated into Microsoft's Azure Kinect DK Depth Camera
Mixel’s IP now in imaging chip for depth camera with world’s smallest Time-of-Flight pixel
San Jose, CA – September 17, 2019 - Mixel®, a leading provider of mixed-signal intellectual property (IP) announced today that Mixel’s MIPI® IP has been successfully integrated into the Microsoft Azure Kinect developer kit, which is now in volume production.
Azure Kinect Developer Kit is an edge device with advanced AI sensors for sophisticated computer vision and speech models. Designed for versatility, it combines an advanced depth sensor and spatial microphone array with a video camera and orientation sensor -- with multiple modes, options, and software development kits (SDKs). The Azure Kinect DK is aimed at broad-based enterprise users and enables the developer to create interactive Virtual, Augmented, and Mixed Reality experiences.
Mixel’s MIPI IP was integrated into the 1MP depth camera, featuring a Time-of-Flight (ToF) imaging chip with advanced pixel technology. This enables higher modulation frequencies and depth precision all in the world’s smallest ToF pixel, at 3.5μm by 3.5μm. This same depth camera incorporating the Mixel IP is also a key part of the Hololens 2 product announced by Microsoft earlier this year and expected to start shipping later this year.
Mixel provided Microsoft with the MIPI D-PHY and controller IP. Microsoft achieved first-time silicon success with this solution and is now in volume production. The MIPI solution includes two IP products delivered fully integrated and validated: Mixel’s MIPI D-PHYSM transmitter and a MIPI CSI-2SM Host Controller Core. The CSI-2 Controller IP is developed by Northwest Logic, a Rambus company, an active participant in Mixel’s MIPI Central Ecosystem Partnership, which brings together best-in-class MIPI ecosystem stakeholders.
The D-PHY link can operate with 1 to 4 lanes and supports an aggregated data rate of 6 Gbps. It uses a clock-forwarded synchronous link that provides high noise immunity and high jitter tolerance. The Mixel IP incorporates proprietary differentiating features to reduce stand-by current and wake-up time.
“We needed a high quality MIPI IP that worked the first time. Mixel’s differentiated solution, wide coverage of nodes and track record of success made our IP provider selection quite easy,” said Microsoft’s Sr. Director of Engineering, Sheethal Nayak. “Mixel’s IP quality and support throughout the development phase were outstanding. We look forward to future collaboration with Mixel.”
Mixel MIPI IP has been silicon-proven at nine different nodes and eight different foundries with more processes under active development, giving Mixel the widest coverage in the industry.
“We are delighted to see Microsoft going into production with this state-of-the art developer kit integrating our IP and achieving first-time success,” said Ashraf Takla, Mixel’s President and CEO. “It is truly exciting to see that Mixel IP is now being widely adopted by several customers targeting Virtual and Mixed reality applications.”
Mixel will be demonstrating many of its own and customers’ products in the upcoming months: at TSMC OIP Ecosystem Forum and GlobalFoundries Technology Conference in September and MIPI DevCon Taipei and Samsung Foundry Forum in October.
About Mixel:
Mixel is a leading provider of mixed-signal IPs and offers a wide portfolio of high-performance mixed-signal connectivity IP solutions. Mixel’s mixed-signal portfolio includes PHYs and SerDes, such as MIPI D-PHY, MIPI M-PHY®, MIPI C-PHYSM, LVDS, and many dual mode PHY supporting multiple standards. Mixel was founded in 1998 and is headquartered in San Jose, CA, with global operation to support a worldwide customer base. For more information contact Mixel at info@mixel.com or visit www.mixel.com.
About MIPI Alliance:
MIPI Alliance (MIPI) develops interface specifications for mobile and mobile-influenced industries. There is at least one MIPI specification in every smartphone manufactured today. Founded in 2003, the organization has over 300 member companies worldwide and 14 active working groups delivering specifications within the mobile ecosystem. Members of the organization include handset manufacturers, device OEMs, software providers, semiconductor companies, application processor developers, IP tool providers, test and test equipment companies, as well as camera, tablet and laptop manufacturers. For more information, please visit www.mipi.org.
|
Mixel, Inc. Hot IP
Related News
- Mixel MIPI D-PHY IP Integrated into Teledyne e2v's new Topaz CMOS Image Sensors
- Mixel's MIPI D-PHY IP Integrated into the Lattice CrossLink-NX FPGA
- Mixel MIPI D-PHY IP Integrated into Lattice's CrossLink Low Power pASSP
- Mixel MIPI C-PHY/D-PHY Combo IP Integrated into Hercules Microelectronics HME-H3 FPGA
- Mixel MIPI D-PHY IP Integrated Into Hercules Microelectronics Award-Winning FPGA/Processor
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |